Update drivers and middleware
- Generated from STM32CubeMX
This commit is contained in:
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/**
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******************************************************************************
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* @file stm32f4xx_hal_exti.h
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* @author MCD Application Team
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* @brief Header file of EXTI HAL module.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2018 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.Clause
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef STM32f4xx_HAL_EXTI_H
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#define STM32f4xx_HAL_EXTI_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f4xx_hal_def.h"
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/** @addtogroup STM32F4xx_HAL_Driver
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* @{
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*/
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/** @defgroup EXTI EXTI
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* @brief EXTI HAL module driver
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* @{
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*/
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/* Exported types ------------------------------------------------------------*/
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/** @defgroup EXTI_Exported_Types EXTI Exported Types
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* @{
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*/
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typedef enum
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{
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HAL_EXTI_COMMON_CB_ID = 0x00U
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} EXTI_CallbackIDTypeDef;
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/**
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* @brief EXTI Handle structure definition
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*/
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typedef struct
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{
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uint32_t Line; /*!< Exti line number */
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void (* PendingCallback)(void); /*!< Exti pending callback */
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} EXTI_HandleTypeDef;
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/**
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* @brief EXTI Configuration structure definition
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*/
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typedef struct
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{
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uint32_t Line; /*!< The Exti line to be configured. This parameter
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can be a value of @ref EXTI_Line */
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uint32_t Mode; /*!< The Exit Mode to be configured for a core.
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This parameter can be a combination of @ref EXTI_Mode */
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uint32_t Trigger; /*!< The Exti Trigger to be configured. This parameter
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can be a value of @ref EXTI_Trigger */
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uint32_t GPIOSel; /*!< The Exti GPIO multiplexer selection to be configured.
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This parameter is only possible for line 0 to 15. It
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can be a value of @ref EXTI_GPIOSel */
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} EXTI_ConfigTypeDef;
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/**
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* @}
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*/
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup EXTI_Exported_Constants EXTI Exported Constants
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* @{
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*/
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/** @defgroup EXTI_Line EXTI Line
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* @{
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*/
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#define EXTI_LINE_0 (EXTI_GPIO | 0x00u) /*!< External interrupt line 0 */
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#define EXTI_LINE_1 (EXTI_GPIO | 0x01u) /*!< External interrupt line 1 */
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#define EXTI_LINE_2 (EXTI_GPIO | 0x02u) /*!< External interrupt line 2 */
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#define EXTI_LINE_3 (EXTI_GPIO | 0x03u) /*!< External interrupt line 3 */
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#define EXTI_LINE_4 (EXTI_GPIO | 0x04u) /*!< External interrupt line 4 */
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#define EXTI_LINE_5 (EXTI_GPIO | 0x05u) /*!< External interrupt line 5 */
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#define EXTI_LINE_6 (EXTI_GPIO | 0x06u) /*!< External interrupt line 6 */
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#define EXTI_LINE_7 (EXTI_GPIO | 0x07u) /*!< External interrupt line 7 */
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#define EXTI_LINE_8 (EXTI_GPIO | 0x08u) /*!< External interrupt line 8 */
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#define EXTI_LINE_9 (EXTI_GPIO | 0x09u) /*!< External interrupt line 9 */
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#define EXTI_LINE_10 (EXTI_GPIO | 0x0Au) /*!< External interrupt line 10 */
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#define EXTI_LINE_11 (EXTI_GPIO | 0x0Bu) /*!< External interrupt line 11 */
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#define EXTI_LINE_12 (EXTI_GPIO | 0x0Cu) /*!< External interrupt line 12 */
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#define EXTI_LINE_13 (EXTI_GPIO | 0x0Du) /*!< External interrupt line 13 */
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#define EXTI_LINE_14 (EXTI_GPIO | 0x0Eu) /*!< External interrupt line 14 */
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#define EXTI_LINE_15 (EXTI_GPIO | 0x0Fu) /*!< External interrupt line 15 */
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#define EXTI_LINE_16 (EXTI_CONFIG | 0x10u) /*!< External interrupt line 16 Connected to the PVD Output */
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#define EXTI_LINE_17 (EXTI_CONFIG | 0x11u) /*!< External interrupt line 17 Connected to the RTC Alarm event */
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#if defined(EXTI_IMR_IM18)
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#define EXTI_LINE_18 (EXTI_CONFIG | 0x12u) /*!< External interrupt line 18 Connected to the USB OTG FS Wakeup from suspend event */
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#else
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#define EXTI_LINE_18 (EXTI_RESERVED | 0x12u) /*!< No interrupt supported in this line */
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#endif /* EXTI_IMR_IM18 */
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#if defined(EXTI_IMR_IM19)
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#define EXTI_LINE_19 (EXTI_CONFIG | 0x13u) /*!< External interrupt line 19 Connected to the Ethernet Wakeup event */
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#else
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#define EXTI_LINE_19 (EXTI_RESERVED | 0x13u) /*!< No interrupt supported in this line */
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#endif /* EXTI_IMR_IM19 */
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#if defined(EXTI_IMR_IM20)
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#define EXTI_LINE_20 (EXTI_CONFIG | 0x14u) /*!< External interrupt line 20 Connected to the USB OTG HS (configured in FS) Wakeup event */
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#else
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#define EXTI_LINE_20 (EXTI_RESERVED | 0x14u) /*!< No interrupt supported in this line */
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#endif /* EXTI_IMR_IM20 */
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#define EXTI_LINE_21 (EXTI_CONFIG | 0x15u) /*!< External interrupt line 21 Connected to the RTC Tamper and Time Stamp events */
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#define EXTI_LINE_22 (EXTI_CONFIG | 0x16u) /*!< External interrupt line 22 Connected to the RTC Wakeup event */
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#if defined(EXTI_IMR_IM23)
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#define EXTI_LINE_23 (EXTI_CONFIG | 0x17u) /*!< External interrupt line 23 Connected to the LPTIM1 asynchronous event */
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#endif /* EXTI_IMR_IM23 */
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/**
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* @}
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*/
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/** @defgroup EXTI_Mode EXTI Mode
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* @{
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*/
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#define EXTI_MODE_NONE 0x00000000u
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#define EXTI_MODE_INTERRUPT 0x00000001u
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#define EXTI_MODE_EVENT 0x00000002u
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/**
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* @}
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*/
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/** @defgroup EXTI_Trigger EXTI Trigger
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* @{
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*/
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#define EXTI_TRIGGER_NONE 0x00000000u
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#define EXTI_TRIGGER_RISING 0x00000001u
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#define EXTI_TRIGGER_FALLING 0x00000002u
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#define EXTI_TRIGGER_RISING_FALLING (EXTI_TRIGGER_RISING | EXTI_TRIGGER_FALLING)
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/**
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* @}
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*/
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/** @defgroup EXTI_GPIOSel EXTI GPIOSel
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* @brief
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* @{
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*/
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#define EXTI_GPIOA 0x00000000u
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#define EXTI_GPIOB 0x00000001u
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#define EXTI_GPIOC 0x00000002u
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#if defined (GPIOD)
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#define EXTI_GPIOD 0x00000003u
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#endif /* GPIOD */
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#if defined (GPIOE)
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#define EXTI_GPIOE 0x00000004u
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#endif /* GPIOE */
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#if defined (GPIOF)
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#define EXTI_GPIOF 0x00000005u
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#endif /* GPIOF */
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#if defined (GPIOG)
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#define EXTI_GPIOG 0x00000006u
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#endif /* GPIOG */
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#if defined (GPIOH)
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#define EXTI_GPIOH 0x00000007u
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#endif /* GPIOH */
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#if defined (GPIOI)
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#define EXTI_GPIOI 0x00000008u
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#endif /* GPIOI */
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#if defined (GPIOJ)
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#define EXTI_GPIOJ 0x00000009u
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#endif /* GPIOJ */
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#if defined (GPIOK)
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#define EXTI_GPIOK 0x0000000Au
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#endif /* GPIOK */
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Exported macro ------------------------------------------------------------*/
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/** @defgroup EXTI_Exported_Macros EXTI Exported Macros
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* @{
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*/
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/**
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* @}
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*/
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/* Private constants --------------------------------------------------------*/
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/** @defgroup EXTI_Private_Constants EXTI Private Constants
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* @{
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*/
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/**
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* @brief EXTI Line property definition
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*/
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#define EXTI_PROPERTY_SHIFT 24u
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#define EXTI_CONFIG (0x02uL << EXTI_PROPERTY_SHIFT)
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#define EXTI_GPIO ((0x04uL << EXTI_PROPERTY_SHIFT) | EXTI_CONFIG)
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#define EXTI_RESERVED (0x08uL << EXTI_PROPERTY_SHIFT)
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#define EXTI_PROPERTY_MASK (EXTI_CONFIG | EXTI_GPIO)
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/**
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* @brief EXTI bit usage
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*/
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#define EXTI_PIN_MASK 0x0000001Fu
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/**
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* @brief EXTI Mask for interrupt & event mode
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*/
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#define EXTI_MODE_MASK (EXTI_MODE_EVENT | EXTI_MODE_INTERRUPT)
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/**
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* @brief EXTI Mask for trigger possibilities
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*/
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#define EXTI_TRIGGER_MASK (EXTI_TRIGGER_RISING | EXTI_TRIGGER_FALLING)
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/**
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* @brief EXTI Line number
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*/
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#if defined(EXTI_IMR_IM23)
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#define EXTI_LINE_NB 24UL
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#else
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#define EXTI_LINE_NB 23UL
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#endif /* EXTI_IMR_IM23 */
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/**
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* @}
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*/
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/* Private macros ------------------------------------------------------------*/
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/** @defgroup EXTI_Private_Macros EXTI Private Macros
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* @{
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*/
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#define IS_EXTI_LINE(__EXTI_LINE__) ((((__EXTI_LINE__) & ~(EXTI_PROPERTY_MASK | EXTI_PIN_MASK)) == 0x00u) && \
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((((__EXTI_LINE__) & EXTI_PROPERTY_MASK) == EXTI_CONFIG) || \
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(((__EXTI_LINE__) & EXTI_PROPERTY_MASK) == EXTI_GPIO)) && \
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(((__EXTI_LINE__) & EXTI_PIN_MASK) < EXTI_LINE_NB))
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#define IS_EXTI_MODE(__EXTI_LINE__) ((((__EXTI_LINE__) & EXTI_MODE_MASK) != 0x00u) && \
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(((__EXTI_LINE__) & ~EXTI_MODE_MASK) == 0x00u))
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#define IS_EXTI_TRIGGER(__EXTI_LINE__) (((__EXTI_LINE__) & ~EXTI_TRIGGER_MASK) == 0x00u)
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#define IS_EXTI_PENDING_EDGE(__EXTI_LINE__) ((__EXTI_LINE__) == EXTI_TRIGGER_RISING_FALLING)
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#define IS_EXTI_CONFIG_LINE(__EXTI_LINE__) (((__EXTI_LINE__) & EXTI_CONFIG) != 0x00u)
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#if !defined (GPIOD)
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#define IS_EXTI_GPIO_PORT(__PORT__) (((__PORT__) == EXTI_GPIOA) || \
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((__PORT__) == EXTI_GPIOB) || \
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((__PORT__) == EXTI_GPIOC) || \
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((__PORT__) == EXTI_GPIOH))
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#elif !defined (GPIOE)
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#define IS_EXTI_GPIO_PORT(__PORT__) (((__PORT__) == EXTI_GPIOA) || \
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((__PORT__) == EXTI_GPIOB) || \
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((__PORT__) == EXTI_GPIOC) || \
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((__PORT__) == EXTI_GPIOD) || \
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((__PORT__) == EXTI_GPIOH))
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#elif !defined (GPIOF)
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#define IS_EXTI_GPIO_PORT(__PORT__) (((__PORT__) == EXTI_GPIOA) || \
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((__PORT__) == EXTI_GPIOB) || \
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((__PORT__) == EXTI_GPIOC) || \
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((__PORT__) == EXTI_GPIOD) || \
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((__PORT__) == EXTI_GPIOE) || \
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((__PORT__) == EXTI_GPIOH))
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#elif !defined (GPIOI)
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#define IS_EXTI_GPIO_PORT(__PORT__) (((__PORT__) == EXTI_GPIOA) || \
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((__PORT__) == EXTI_GPIOB) || \
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((__PORT__) == EXTI_GPIOC) || \
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((__PORT__) == EXTI_GPIOD) || \
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((__PORT__) == EXTI_GPIOE) || \
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((__PORT__) == EXTI_GPIOF) || \
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((__PORT__) == EXTI_GPIOG) || \
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((__PORT__) == EXTI_GPIOH))
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#elif !defined (GPIOJ)
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#define IS_EXTI_GPIO_PORT(__PORT__) (((__PORT__) == EXTI_GPIOA) || \
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((__PORT__) == EXTI_GPIOB) || \
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((__PORT__) == EXTI_GPIOC) || \
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((__PORT__) == EXTI_GPIOD) || \
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((__PORT__) == EXTI_GPIOE) || \
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((__PORT__) == EXTI_GPIOF) || \
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((__PORT__) == EXTI_GPIOG) || \
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((__PORT__) == EXTI_GPIOH) || \
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((__PORT__) == EXTI_GPIOI))
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#else
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#define IS_EXTI_GPIO_PORT(__PORT__) (((__PORT__) == EXTI_GPIOA) || \
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((__PORT__) == EXTI_GPIOB) || \
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((__PORT__) == EXTI_GPIOC) || \
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((__PORT__) == EXTI_GPIOD) || \
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((__PORT__) == EXTI_GPIOE) || \
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((__PORT__) == EXTI_GPIOF) || \
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((__PORT__) == EXTI_GPIOG) || \
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((__PORT__) == EXTI_GPIOH) || \
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((__PORT__) == EXTI_GPIOI) || \
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((__PORT__) == EXTI_GPIOJ) || \
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((__PORT__) == EXTI_GPIOK))
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#endif /* GPIOD */
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#define IS_EXTI_GPIO_PIN(__PIN__) ((__PIN__) < 16U)
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/**
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* @}
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*/
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/* Exported functions --------------------------------------------------------*/
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/** @defgroup EXTI_Exported_Functions EXTI Exported Functions
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* @brief EXTI Exported Functions
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* @{
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*/
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/** @defgroup EXTI_Exported_Functions_Group1 Configuration functions
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* @brief Configuration functions
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* @{
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*/
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/* Configuration functions ****************************************************/
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HAL_StatusTypeDef HAL_EXTI_SetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig);
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HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig);
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HAL_StatusTypeDef HAL_EXTI_ClearConfigLine(EXTI_HandleTypeDef *hexti);
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HAL_StatusTypeDef HAL_EXTI_RegisterCallback(EXTI_HandleTypeDef *hexti, EXTI_CallbackIDTypeDef CallbackID, void (*pPendingCbfn)(void));
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HAL_StatusTypeDef HAL_EXTI_GetHandle(EXTI_HandleTypeDef *hexti, uint32_t ExtiLine);
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/**
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* @}
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*/
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/** @defgroup EXTI_Exported_Functions_Group2 IO operation functions
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* @brief IO operation functions
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* @{
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*/
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/* IO operation functions *****************************************************/
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void HAL_EXTI_IRQHandler(EXTI_HandleTypeDef *hexti);
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uint32_t HAL_EXTI_GetPending(EXTI_HandleTypeDef *hexti, uint32_t Edge);
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void HAL_EXTI_ClearPending(EXTI_HandleTypeDef *hexti, uint32_t Edge);
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void HAL_EXTI_GenerateSWI(EXTI_HandleTypeDef *hexti);
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* STM32f4xx_HAL_EXTI_H */
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File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,436 @@
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/**
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******************************************************************************
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||||
* @file stm32f4xx_hal_pwr.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of PWR HAL module.
|
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******************************************************************************
|
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* @attention
|
||||
*
|
||||
* Copyright (c) 2017 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file in
|
||||
* the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
******************************************************************************
|
||||
*/
|
||||
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/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F4xx_HAL_PWR_H
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#define __STM32F4xx_HAL_PWR_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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||||
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/* Includes ------------------------------------------------------------------*/
|
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#include "stm32f4xx_hal_def.h"
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/** @addtogroup STM32F4xx_HAL_Driver
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* @{
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*/
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/** @addtogroup PWR
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* @{
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*/
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/* Exported types ------------------------------------------------------------*/
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/** @defgroup PWR_Exported_Types PWR Exported Types
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* @{
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*/
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/**
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* @brief PWR PVD configuration structure definition
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*/
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typedef struct
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{
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uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level.
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This parameter can be a value of @ref PWR_PVD_detection_level */
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uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins.
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This parameter can be a value of @ref PWR_PVD_Mode */
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}PWR_PVDTypeDef;
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/**
|
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* @}
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*/
|
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/* Exported constants --------------------------------------------------------*/
|
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/** @defgroup PWR_Exported_Constants PWR Exported Constants
|
||||
* @{
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||||
*/
|
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/** @defgroup PWR_WakeUp_Pins PWR WakeUp Pins
|
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* @{
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*/
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#define PWR_WAKEUP_PIN1 0x00000100U
|
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/**
|
||||
* @}
|
||||
*/
|
||||
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/** @defgroup PWR_PVD_detection_level PWR PVD detection level
|
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* @{
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*/
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#define PWR_PVDLEVEL_0 PWR_CR_PLS_LEV0
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#define PWR_PVDLEVEL_1 PWR_CR_PLS_LEV1
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#define PWR_PVDLEVEL_2 PWR_CR_PLS_LEV2
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#define PWR_PVDLEVEL_3 PWR_CR_PLS_LEV3
|
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#define PWR_PVDLEVEL_4 PWR_CR_PLS_LEV4
|
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#define PWR_PVDLEVEL_5 PWR_CR_PLS_LEV5
|
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#define PWR_PVDLEVEL_6 PWR_CR_PLS_LEV6
|
||||
#define PWR_PVDLEVEL_7 PWR_CR_PLS_LEV7/* External input analog voltage
|
||||
(Compare internally to VREFINT) */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup PWR_PVD_Mode PWR PVD Mode
|
||||
* @{
|
||||
*/
|
||||
#define PWR_PVD_MODE_NORMAL 0x00000000U /*!< basic mode is used */
|
||||
#define PWR_PVD_MODE_IT_RISING 0x00010001U /*!< External Interrupt Mode with Rising edge trigger detection */
|
||||
#define PWR_PVD_MODE_IT_FALLING 0x00010002U /*!< External Interrupt Mode with Falling edge trigger detection */
|
||||
#define PWR_PVD_MODE_IT_RISING_FALLING 0x00010003U /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
|
||||
#define PWR_PVD_MODE_EVENT_RISING 0x00020001U /*!< Event Mode with Rising edge trigger detection */
|
||||
#define PWR_PVD_MODE_EVENT_FALLING 0x00020002U /*!< Event Mode with Falling edge trigger detection */
|
||||
#define PWR_PVD_MODE_EVENT_RISING_FALLING 0x00020003U /*!< Event Mode with Rising/Falling edge trigger detection */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup PWR_Regulator_state_in_STOP_mode PWR Regulator state in SLEEP/STOP mode
|
||||
* @{
|
||||
*/
|
||||
#define PWR_MAINREGULATOR_ON 0x00000000U
|
||||
#define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPDS
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry
|
||||
* @{
|
||||
*/
|
||||
#define PWR_SLEEPENTRY_WFI ((uint8_t)0x01)
|
||||
#define PWR_SLEEPENTRY_WFE ((uint8_t)0x02)
|
||||
#define PWR_SLEEPENTRY_WFE_NO_EVT_CLEAR ((uint8_t)0x03)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup PWR_STOP_mode_entry PWR STOP mode entry
|
||||
* @{
|
||||
*/
|
||||
#define PWR_STOPENTRY_WFI ((uint8_t)0x01)
|
||||
#define PWR_STOPENTRY_WFE ((uint8_t)0x02)
|
||||
#define PWR_STOPENTRY_WFE_NO_EVT_CLEAR ((uint8_t)0x03)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup PWR_Flag PWR Flag
|
||||
* @{
|
||||
*/
|
||||
#define PWR_FLAG_WU PWR_CSR_WUF
|
||||
#define PWR_FLAG_SB PWR_CSR_SBF
|
||||
#define PWR_FLAG_PVDO PWR_CSR_PVDO
|
||||
#define PWR_FLAG_BRR PWR_CSR_BRR
|
||||
#define PWR_FLAG_VOSRDY PWR_CSR_VOSRDY
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/** @defgroup PWR_Exported_Macro PWR Exported Macro
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @brief Check PWR flag is set or not.
|
||||
* @param __FLAG__ specifies the flag to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event
|
||||
* was received from the WKUP pin or from the RTC alarm (Alarm A
|
||||
* or Alarm B), RTC Tamper event, RTC TimeStamp event or RTC Wakeup.
|
||||
* An additional wakeup event is detected if the WKUP pin is enabled
|
||||
* (by setting the EWUP bit) when the WKUP pin level is already high.
|
||||
* @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was
|
||||
* resumed from StandBy mode.
|
||||
* @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled
|
||||
* by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode
|
||||
* For this reason, this bit is equal to 0 after Standby or reset
|
||||
* until the PVDE bit is set.
|
||||
* @arg PWR_FLAG_BRR: Backup regulator ready flag. This bit is not reset
|
||||
* when the device wakes up from Standby mode or by a system reset
|
||||
* or power reset.
|
||||
* @arg PWR_FLAG_VOSRDY: This flag indicates that the Regulator voltage
|
||||
* scaling output selection is ready.
|
||||
* @retval The new state of __FLAG__ (TRUE or FALSE).
|
||||
*/
|
||||
#define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__))
|
||||
|
||||
/** @brief Clear the PWR's pending flags.
|
||||
* @param __FLAG__ specifies the flag to clear.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg PWR_FLAG_WU: Wake Up flag
|
||||
* @arg PWR_FLAG_SB: StandBy flag
|
||||
*/
|
||||
#define __HAL_PWR_CLEAR_FLAG(__FLAG__) (PWR->CR |= (__FLAG__) << 2U)
|
||||
|
||||
/**
|
||||
* @brief Enable the PVD Exti Line 16.
|
||||
* @retval None.
|
||||
*/
|
||||
#define __HAL_PWR_PVD_EXTI_ENABLE_IT() (EXTI->IMR |= (PWR_EXTI_LINE_PVD))
|
||||
|
||||
/**
|
||||
* @brief Disable the PVD EXTI Line 16.
|
||||
* @retval None.
|
||||
*/
|
||||
#define __HAL_PWR_PVD_EXTI_DISABLE_IT() (EXTI->IMR &= ~(PWR_EXTI_LINE_PVD))
|
||||
|
||||
/**
|
||||
* @brief Enable event on PVD Exti Line 16.
|
||||
* @retval None.
|
||||
*/
|
||||
#define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() (EXTI->EMR |= (PWR_EXTI_LINE_PVD))
|
||||
|
||||
/**
|
||||
* @brief Disable event on PVD Exti Line 16.
|
||||
* @retval None.
|
||||
*/
|
||||
#define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(PWR_EXTI_LINE_PVD))
|
||||
|
||||
/**
|
||||
* @brief Enable the PVD Extended Interrupt Rising Trigger.
|
||||
* @retval None.
|
||||
*/
|
||||
#define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
|
||||
|
||||
/**
|
||||
* @brief Disable the PVD Extended Interrupt Rising Trigger.
|
||||
* @retval None.
|
||||
*/
|
||||
#define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
|
||||
|
||||
/**
|
||||
* @brief Enable the PVD Extended Interrupt Falling Trigger.
|
||||
* @retval None.
|
||||
*/
|
||||
#define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
|
||||
|
||||
|
||||
/**
|
||||
* @brief Disable the PVD Extended Interrupt Falling Trigger.
|
||||
* @retval None.
|
||||
*/
|
||||
#define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
|
||||
|
||||
|
||||
/**
|
||||
* @brief PVD EXTI line configuration: set rising & falling edge trigger.
|
||||
* @retval None.
|
||||
*/
|
||||
#define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() do{__HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();\
|
||||
__HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();\
|
||||
}while(0U)
|
||||
|
||||
/**
|
||||
* @brief Disable the PVD Extended Interrupt Rising & Falling Trigger.
|
||||
* This parameter can be:
|
||||
* @retval None.
|
||||
*/
|
||||
#define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() do{__HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();\
|
||||
__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();\
|
||||
}while(0U)
|
||||
|
||||
/**
|
||||
* @brief checks whether the specified PVD Exti interrupt flag is set or not.
|
||||
* @retval EXTI PVD Line Status.
|
||||
*/
|
||||
#define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD))
|
||||
|
||||
/**
|
||||
* @brief Clear the PVD Exti flag.
|
||||
* @retval None.
|
||||
*/
|
||||
#define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD))
|
||||
|
||||
/**
|
||||
* @brief Generates a Software interrupt on PVD EXTI line.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() (EXTI->SWIER |= (PWR_EXTI_LINE_PVD))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Include PWR HAL Extension module */
|
||||
#include "stm32f4xx_hal_pwr_ex.h"
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @addtogroup PWR_Exported_Functions PWR Exported Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
|
||||
* @{
|
||||
*/
|
||||
/* Initialization and de-initialization functions *****************************/
|
||||
void HAL_PWR_DeInit(void);
|
||||
void HAL_PWR_EnableBkUpAccess(void);
|
||||
void HAL_PWR_DisableBkUpAccess(void);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions
|
||||
* @{
|
||||
*/
|
||||
/* Peripheral Control functions **********************************************/
|
||||
/* PVD configuration */
|
||||
void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD);
|
||||
void HAL_PWR_EnablePVD(void);
|
||||
void HAL_PWR_DisablePVD(void);
|
||||
|
||||
/* WakeUp pins configuration */
|
||||
void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx);
|
||||
void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx);
|
||||
|
||||
/* Low Power modes entry */
|
||||
void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
|
||||
void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry);
|
||||
void HAL_PWR_EnterSTANDBYMode(void);
|
||||
|
||||
/* Power PVD IRQ Handler */
|
||||
void HAL_PWR_PVD_IRQHandler(void);
|
||||
void HAL_PWR_PVDCallback(void);
|
||||
|
||||
/* Cortex System Control functions *******************************************/
|
||||
void HAL_PWR_EnableSleepOnExit(void);
|
||||
void HAL_PWR_DisableSleepOnExit(void);
|
||||
void HAL_PWR_EnableSEVOnPend(void);
|
||||
void HAL_PWR_DisableSEVOnPend(void);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private types -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private constants ---------------------------------------------------------*/
|
||||
/** @defgroup PWR_Private_Constants PWR Private Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup PWR_PVD_EXTI_Line PWR PVD EXTI Line
|
||||
* @{
|
||||
*/
|
||||
#define PWR_EXTI_LINE_PVD ((uint32_t)EXTI_IMR_MR16) /*!< External interrupt line 16 Connected to the PVD EXTI Line */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup PWR_register_alias_address PWR Register alias address
|
||||
* @{
|
||||
*/
|
||||
/* ------------- PWR registers bit address in the alias region ---------------*/
|
||||
#define PWR_OFFSET (PWR_BASE - PERIPH_BASE)
|
||||
#define PWR_CR_OFFSET 0x00U
|
||||
#define PWR_CSR_OFFSET 0x04U
|
||||
#define PWR_CR_OFFSET_BB (PWR_OFFSET + PWR_CR_OFFSET)
|
||||
#define PWR_CSR_OFFSET_BB (PWR_OFFSET + PWR_CSR_OFFSET)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup PWR_CR_register_alias PWR CR Register alias address
|
||||
* @{
|
||||
*/
|
||||
/* --- CR Register ---*/
|
||||
/* Alias word address of DBP bit */
|
||||
#define DBP_BIT_NUMBER PWR_CR_DBP_Pos
|
||||
#define CR_DBP_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (DBP_BIT_NUMBER * 4U))
|
||||
|
||||
/* Alias word address of PVDE bit */
|
||||
#define PVDE_BIT_NUMBER PWR_CR_PVDE_Pos
|
||||
#define CR_PVDE_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (PVDE_BIT_NUMBER * 4U))
|
||||
|
||||
/* Alias word address of VOS bit */
|
||||
#define VOS_BIT_NUMBER PWR_CR_VOS_Pos
|
||||
#define CR_VOS_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (VOS_BIT_NUMBER * 4U))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup PWR_CSR_register_alias PWR CSR Register alias address
|
||||
* @{
|
||||
*/
|
||||
/* --- CSR Register ---*/
|
||||
/* Alias word address of EWUP bit */
|
||||
#define EWUP_BIT_NUMBER PWR_CSR_EWUP_Pos
|
||||
#define CSR_EWUP_BB (PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32U) + (EWUP_BIT_NUMBER * 4U))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
/** @defgroup PWR_Private_Macros PWR Private Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup PWR_IS_PWR_Definitions PWR Private macros to check input parameters
|
||||
* @{
|
||||
*/
|
||||
#define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \
|
||||
((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \
|
||||
((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \
|
||||
((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7))
|
||||
#define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \
|
||||
((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \
|
||||
((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \
|
||||
((MODE) == PWR_PVD_MODE_NORMAL))
|
||||
#define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \
|
||||
((REGULATOR) == PWR_LOWPOWERREGULATOR_ON))
|
||||
|
||||
#define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || \
|
||||
((ENTRY) == PWR_SLEEPENTRY_WFE) || \
|
||||
((ENTRY) == PWR_SLEEPENTRY_WFE_NO_EVT_CLEAR))
|
||||
|
||||
#define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || \
|
||||
((ENTRY) == PWR_STOPENTRY_WFE) || \
|
||||
((ENTRY) == PWR_STOPENTRY_WFE_NO_EVT_CLEAR))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#endif /* __STM32F4xx_HAL_PWR_H */
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,313 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f4xx_hal_dma_ex.c
|
||||
* @author MCD Application Team
|
||||
* @brief DMA Extension HAL module driver
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities of the DMA Extension peripheral:
|
||||
* + Extended features functions
|
||||
*
|
||||
@verbatim
|
||||
==============================================================================
|
||||
##### How to use this driver #####
|
||||
==============================================================================
|
||||
[..]
|
||||
The DMA Extension HAL driver can be used as follows:
|
||||
(#) Start a multi buffer transfer using the HAL_DMA_MultiBufferStart() function
|
||||
for polling mode or HAL_DMA_MultiBufferStart_IT() for interrupt mode.
|
||||
|
||||
-@- In Memory-to-Memory transfer mode, Multi (Double) Buffer mode is not allowed.
|
||||
-@- When Multi (Double) Buffer mode is enabled the, transfer is circular by default.
|
||||
-@- In Multi (Double) buffer mode, it is possible to update the base address for
|
||||
the AHB memory port on the fly (DMA_SxM0AR or DMA_SxM1AR) when the stream is enabled.
|
||||
|
||||
@endverbatim
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2017 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file in
|
||||
* the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f4xx_hal.h"
|
||||
|
||||
/** @addtogroup STM32F4xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup DMAEx DMAEx
|
||||
* @brief DMA Extended HAL module driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifdef HAL_DMA_MODULE_ENABLED
|
||||
|
||||
/* Private types -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private Constants ---------------------------------------------------------*/
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
/** @addtogroup DMAEx_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
static void DMA_MultiBufferSetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions ---------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup DMAEx_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
/** @addtogroup DMAEx_Exported_Functions_Group1
|
||||
*
|
||||
@verbatim
|
||||
===============================================================================
|
||||
##### Extended features functions #####
|
||||
===============================================================================
|
||||
[..] This section provides functions allowing to:
|
||||
(+) Configure the source, destination address and data length and
|
||||
Start MultiBuffer DMA transfer
|
||||
(+) Configure the source, destination address and data length and
|
||||
Start MultiBuffer DMA transfer with interrupt
|
||||
(+) Change on the fly the memory0 or memory1 address.
|
||||
|
||||
@endverbatim
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @brief Starts the multi_buffer DMA Transfer.
|
||||
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified DMA Stream.
|
||||
* @param SrcAddress The source memory Buffer address
|
||||
* @param DstAddress The destination memory Buffer address
|
||||
* @param SecondMemAddress The second memory Buffer address in case of multi buffer Transfer
|
||||
* @param DataLength The length of data to be transferred from source to destination
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength)
|
||||
{
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_DMA_BUFFER_SIZE(DataLength));
|
||||
|
||||
/* Memory-to-memory transfer not supported in double buffering mode */
|
||||
if (hdma->Init.Direction == DMA_MEMORY_TO_MEMORY)
|
||||
{
|
||||
hdma->ErrorCode = HAL_DMA_ERROR_NOT_SUPPORTED;
|
||||
status = HAL_ERROR;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Process Locked */
|
||||
__HAL_LOCK(hdma);
|
||||
|
||||
if(HAL_DMA_STATE_READY == hdma->State)
|
||||
{
|
||||
/* Change DMA peripheral state */
|
||||
hdma->State = HAL_DMA_STATE_BUSY;
|
||||
|
||||
/* Enable the double buffer mode */
|
||||
hdma->Instance->CR |= (uint32_t)DMA_SxCR_DBM;
|
||||
|
||||
/* Configure DMA Stream destination address */
|
||||
hdma->Instance->M1AR = SecondMemAddress;
|
||||
|
||||
/* Configure the source, destination address and the data length */
|
||||
DMA_MultiBufferSetConfig(hdma, SrcAddress, DstAddress, DataLength);
|
||||
|
||||
/* Enable the peripheral */
|
||||
__HAL_DMA_ENABLE(hdma);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Return error status */
|
||||
status = HAL_BUSY;
|
||||
}
|
||||
}
|
||||
return status;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Starts the multi_buffer DMA Transfer with interrupt enabled.
|
||||
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified DMA Stream.
|
||||
* @param SrcAddress The source memory Buffer address
|
||||
* @param DstAddress The destination memory Buffer address
|
||||
* @param SecondMemAddress The second memory Buffer address in case of multi buffer Transfer
|
||||
* @param DataLength The length of data to be transferred from source to destination
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength)
|
||||
{
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_DMA_BUFFER_SIZE(DataLength));
|
||||
|
||||
/* Memory-to-memory transfer not supported in double buffering mode */
|
||||
if (hdma->Init.Direction == DMA_MEMORY_TO_MEMORY)
|
||||
{
|
||||
hdma->ErrorCode = HAL_DMA_ERROR_NOT_SUPPORTED;
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
||||
/* Check callback functions */
|
||||
if ((NULL == hdma->XferCpltCallback) || (NULL == hdma->XferM1CpltCallback) || (NULL == hdma->XferErrorCallback))
|
||||
{
|
||||
hdma->ErrorCode = HAL_DMA_ERROR_PARAM;
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
||||
/* Process locked */
|
||||
__HAL_LOCK(hdma);
|
||||
|
||||
if(HAL_DMA_STATE_READY == hdma->State)
|
||||
{
|
||||
/* Change DMA peripheral state */
|
||||
hdma->State = HAL_DMA_STATE_BUSY;
|
||||
|
||||
/* Initialize the error code */
|
||||
hdma->ErrorCode = HAL_DMA_ERROR_NONE;
|
||||
|
||||
/* Enable the Double buffer mode */
|
||||
hdma->Instance->CR |= (uint32_t)DMA_SxCR_DBM;
|
||||
|
||||
/* Configure DMA Stream destination address */
|
||||
hdma->Instance->M1AR = SecondMemAddress;
|
||||
|
||||
/* Configure the source, destination address and the data length */
|
||||
DMA_MultiBufferSetConfig(hdma, SrcAddress, DstAddress, DataLength);
|
||||
|
||||
/* Clear all flags */
|
||||
__HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
|
||||
__HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
|
||||
__HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma));
|
||||
__HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_DME_FLAG_INDEX(hdma));
|
||||
__HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_FE_FLAG_INDEX(hdma));
|
||||
|
||||
/* Enable Common interrupts*/
|
||||
hdma->Instance->CR |= DMA_IT_TC | DMA_IT_TE | DMA_IT_DME;
|
||||
hdma->Instance->FCR |= DMA_IT_FE;
|
||||
|
||||
if((hdma->XferHalfCpltCallback != NULL) || (hdma->XferM1HalfCpltCallback != NULL))
|
||||
{
|
||||
hdma->Instance->CR |= DMA_IT_HT;
|
||||
}
|
||||
|
||||
/* Enable the peripheral */
|
||||
__HAL_DMA_ENABLE(hdma);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Process unlocked */
|
||||
__HAL_UNLOCK(hdma);
|
||||
|
||||
/* Return error status */
|
||||
status = HAL_BUSY;
|
||||
}
|
||||
return status;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Change the memory0 or memory1 address on the fly.
|
||||
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified DMA Stream.
|
||||
* @param Address The new address
|
||||
* @param memory the memory to be changed, This parameter can be one of
|
||||
* the following values:
|
||||
* MEMORY0 /
|
||||
* MEMORY1
|
||||
* @note The MEMORY0 address can be changed only when the current transfer use
|
||||
* MEMORY1 and the MEMORY1 address can be changed only when the current
|
||||
* transfer use MEMORY0.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_DMAEx_ChangeMemory(DMA_HandleTypeDef *hdma, uint32_t Address, HAL_DMA_MemoryTypeDef memory)
|
||||
{
|
||||
if(memory == MEMORY0)
|
||||
{
|
||||
/* change the memory0 address */
|
||||
hdma->Instance->M0AR = Address;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* change the memory1 address */
|
||||
hdma->Instance->M1AR = Address;
|
||||
}
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup DMAEx_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Set the DMA Transfer parameter.
|
||||
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified DMA Stream.
|
||||
* @param SrcAddress The source memory Buffer address
|
||||
* @param DstAddress The destination memory Buffer address
|
||||
* @param DataLength The length of data to be transferred from source to destination
|
||||
* @retval HAL status
|
||||
*/
|
||||
static void DMA_MultiBufferSetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
|
||||
{
|
||||
/* Configure DMA Stream data length */
|
||||
hdma->Instance->NDTR = DataLength;
|
||||
|
||||
/* Peripheral to Memory */
|
||||
if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
|
||||
{
|
||||
/* Configure DMA Stream destination address */
|
||||
hdma->Instance->PAR = DstAddress;
|
||||
|
||||
/* Configure DMA Stream source address */
|
||||
hdma->Instance->M0AR = SrcAddress;
|
||||
}
|
||||
/* Memory to Peripheral */
|
||||
else
|
||||
{
|
||||
/* Configure DMA Stream source address */
|
||||
hdma->Instance->PAR = SrcAddress;
|
||||
|
||||
/* Configure DMA Stream destination address */
|
||||
hdma->Instance->M0AR = DstAddress;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* HAL_DMA_MODULE_ENABLED */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
Reference in New Issue
Block a user