Compare commits
7 Commits
| Author | SHA1 | Date | |
|---|---|---|---|
| 1ad8e5b04f | |||
| ef034f3195 | |||
| 825ddc6961 | |||
| 604e9e603b | |||
| 7b30c3cedd | |||
| 8d0b508ff6 | |||
| 6ad1acc2ee |
+4
-2
@@ -45,8 +45,10 @@ extern "C" {
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/* Exported macro ------------------------------------------------------------*/
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/* Exported macro ------------------------------------------------------------*/
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/* USER CODE BEGIN EM */
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/* USER CODE BEGIN EM */
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#define DEBUG
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#define DEBUG_ITM
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#ifdef DEBUG
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#define DEBUG_DUMMY_FRAME
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#ifdef DEBUG_ITM
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#include <stdio.h>
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#include <stdio.h>
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#define DEBUG_PRINT(...) printf(__VA_ARGS__)
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#define DEBUG_PRINT(...) printf(__VA_ARGS__)
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#else
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#else
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@@ -56,6 +56,7 @@ void SDIO_IRQHandler(void);
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void TIM6_DAC_IRQHandler(void);
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void TIM6_DAC_IRQHandler(void);
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void DMA2_Stream3_IRQHandler(void);
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void DMA2_Stream3_IRQHandler(void);
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void DMA2_Stream6_IRQHandler(void);
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void DMA2_Stream6_IRQHandler(void);
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void DMA2_Stream7_IRQHandler(void);
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/* USER CODE BEGIN EFP */
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/* USER CODE BEGIN EFP */
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/* USER CODE END EFP */
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/* USER CODE END EFP */
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+3
-1
@@ -117,13 +117,15 @@ void vCANListener(void *argument)
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for (;;)
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for (;;)
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{
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{
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if (osMessageQueueGet(queue, &message, NULL, osWaitForever) == osOK)
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if (osMessageQueueGet(queue, &message, NULL, 1000) == osOK)
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{
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{
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// J1939 decoding
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// J1939 decoding
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// RELAY: Push to the UART queue
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// RELAY: Push to the UART queue
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osMessageQueuePut(xUARTQueue, &message, 0U, 0U);
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osMessageQueuePut(xUARTQueue, &message, 0U, 0U);
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}
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}
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else DEBUG_PRINT("No CAN yet!\r\n");
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}
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}
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}
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}
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/* END vCANListener */
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/* END vCANListener */
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+21
-1
@@ -104,17 +104,37 @@ void vUARTLogger(void *argument)
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CanMessage_t message;
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CanMessage_t message;
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char tx_buffer[45];
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char tx_buffer[45];
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#ifdef DEBUG_DUMMY_FRAME
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CanMessage_t dummy_frame = {
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.id = 0x0CF00400, // J1939 EEC1 ID
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.dlc = 8, // 8 bytes of data
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.isExtended = 1, // 29-bit Extended ID
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.source = 1, // CAN1
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.payload = {0xAA, 0xBB, 0xCC, 0xDD, 0xEE, 0xFF, 0x11, 0x22}
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};
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#endif
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for (;;)
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for (;;)
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{
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DEBUG_PRINT("Waiting for CAN traffic...\r\n");
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#ifdef DEBUG_DUMMY_FRAME
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osMessageQueuePut(xUARTQueue, &dummy_frame, 0U, 0U);
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osDelay(1000);
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#endif
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if (osMessageQueueGet(xUARTQueue, &message, NULL, osWaitForever) == osOK)
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{
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{
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DEBUG_PRINT("Waiting for CAN traffic...\r\n");
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DEBUG_PRINT("Waiting for CAN traffic...\r\n");
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if (osMessageQueueGet(xUARTQueue, &message, NULL, osWaitForever) == osOK)
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if (osMessageQueueGet(xUARTQueue, &message, NULL, osWaitForever) == osOK)
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{
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{
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DEBUG_PRINT("CAN frame detected\r\n");
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DEBUG_PRINT("CAN frame detected\r\n");
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format_can_message(tx_buffer, message.source, &message);
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int len = format_can_message(tx_buffer, message.source, &message);
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HAL_UART_Transmit_DMA(&huart1, (uint8_t*)tx_buffer, len);
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HAL_UART_Transmit_DMA(&huart1, (uint8_t*)tx_buffer, len);
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osSemaphoreAcquire(xUARTDMASemaphore, osWaitForever);
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osSemaphoreAcquire(xUARTDMASemaphore, osWaitForever);
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DEBUG_PRINT("CAN frame sent via UART\r\n");
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DEBUG_PRINT("CAN frame sent via UART\r\n");
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}
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}
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}
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}
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}
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}
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}
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/* END vUARTLoggerListen */
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/* END vUARTLoggerListen */
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+5
-1
@@ -46,6 +46,7 @@ DMA_HandleTypeDef hdma_sdio_rx;
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DMA_HandleTypeDef hdma_sdio_tx;
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DMA_HandleTypeDef hdma_sdio_tx;
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UART_HandleTypeDef huart1;
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UART_HandleTypeDef huart1;
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DMA_HandleTypeDef hdma_usart1_tx;
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/* USER CODE BEGIN PV */
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/* USER CODE BEGIN PV */
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LED_Config led_can1 = {GPIOB, GPIO_PIN_5};
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LED_Config led_can1 = {GPIOB, GPIO_PIN_5};
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@@ -386,7 +387,7 @@ static void MX_USART1_UART_Init(void)
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/* USER CODE END USART1_Init 1 */
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/* USER CODE END USART1_Init 1 */
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huart1.Instance = USART1;
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huart1.Instance = USART1;
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huart1.Init.BaudRate = 1152000;
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huart1.Init.BaudRate = 115200;
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huart1.Init.WordLength = UART_WORDLENGTH_8B;
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huart1.Init.WordLength = UART_WORDLENGTH_8B;
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huart1.Init.StopBits = UART_STOPBITS_1;
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huart1.Init.StopBits = UART_STOPBITS_1;
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huart1.Init.Parity = UART_PARITY_NONE;
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huart1.Init.Parity = UART_PARITY_NONE;
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@@ -419,6 +420,9 @@ static void MX_DMA_Init(void)
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/* DMA2_Stream6_IRQn interrupt configuration */
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/* DMA2_Stream6_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(DMA2_Stream6_IRQn, 5, 0);
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HAL_NVIC_SetPriority(DMA2_Stream6_IRQn, 5, 0);
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HAL_NVIC_EnableIRQ(DMA2_Stream6_IRQn);
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HAL_NVIC_EnableIRQ(DMA2_Stream6_IRQn);
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/* DMA2_Stream7_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 5, 0);
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HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn);
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/* USER CODE BEGIN MX_DMA_Init 1 */
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/* USER CODE BEGIN MX_DMA_Init 1 */
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DEBUG_PRINT("DMA initialized!\r\n");
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DEBUG_PRINT("DMA initialized!\r\n");
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@@ -26,6 +26,8 @@ extern DMA_HandleTypeDef hdma_sdio_rx;
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extern DMA_HandleTypeDef hdma_sdio_tx;
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extern DMA_HandleTypeDef hdma_sdio_tx;
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extern DMA_HandleTypeDef hdma_usart1_tx;
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/* Private typedef -----------------------------------------------------------*/
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/* Private typedef -----------------------------------------------------------*/
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/* USER CODE BEGIN TD */
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/* USER CODE BEGIN TD */
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@@ -371,6 +373,25 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart)
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GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
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GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
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HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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/* USART1 DMA Init */
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/* USART1_TX Init */
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hdma_usart1_tx.Instance = DMA2_Stream7;
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hdma_usart1_tx.Init.Channel = DMA_CHANNEL_4;
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hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
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hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
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hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE;
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hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
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hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
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hdma_usart1_tx.Init.Mode = DMA_NORMAL;
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hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW;
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hdma_usart1_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
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if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK)
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{
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Error_Handler();
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}
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__HAL_LINKDMA(huart,hdmatx,hdma_usart1_tx);
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/* USER CODE BEGIN USART1_MspInit 1 */
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/* USER CODE BEGIN USART1_MspInit 1 */
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/* USER CODE END USART1_MspInit 1 */
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/* USER CODE END USART1_MspInit 1 */
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@@ -401,6 +422,8 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
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*/
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*/
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HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10);
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HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10);
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/* USART1 DMA DeInit */
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HAL_DMA_DeInit(huart->hdmatx);
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/* USER CODE BEGIN USART1_MspDeInit 1 */
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/* USER CODE BEGIN USART1_MspDeInit 1 */
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/* USER CODE END USART1_MspDeInit 1 */
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/* USER CODE END USART1_MspDeInit 1 */
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@@ -58,6 +58,7 @@
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extern DMA_HandleTypeDef hdma_sdio_rx;
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extern DMA_HandleTypeDef hdma_sdio_rx;
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extern DMA_HandleTypeDef hdma_sdio_tx;
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extern DMA_HandleTypeDef hdma_sdio_tx;
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extern SD_HandleTypeDef hsd;
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extern SD_HandleTypeDef hsd;
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extern DMA_HandleTypeDef hdma_usart1_tx;
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extern TIM_HandleTypeDef htim6;
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extern TIM_HandleTypeDef htim6;
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/* USER CODE BEGIN EV */
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/* USER CODE BEGIN EV */
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@@ -218,6 +219,20 @@ void DMA2_Stream6_IRQHandler(void)
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/* USER CODE END DMA2_Stream6_IRQn 1 */
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/* USER CODE END DMA2_Stream6_IRQn 1 */
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}
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}
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/**
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* @brief This function handles DMA2 stream7 global interrupt.
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*/
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void DMA2_Stream7_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA2_Stream7_IRQn 0 */
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/* USER CODE END DMA2_Stream7_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_usart1_tx);
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/* USER CODE BEGIN DMA2_Stream7_IRQn 1 */
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/* USER CODE END DMA2_Stream7_IRQn 1 */
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}
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/* USER CODE BEGIN 1 */
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/* USER CODE BEGIN 1 */
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/* USER CODE END 1 */
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/* USER CODE END 1 */
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+13
-1
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CAN2.Prescaler=8
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CAN2.Prescaler=8
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Dma.Request0=SDIO_RX
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Dma.Request0=SDIO_RX
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Dma.Request1=SDIO_TX
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Dma.Request1=SDIO_TX
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Dma.RequestsNb=2
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Dma.Request2=USART1_TX
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Dma.RequestsNb=3
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Dma.SDIO_RX.0.Direction=DMA_PERIPH_TO_MEMORY
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Dma.SDIO_RX.0.Direction=DMA_PERIPH_TO_MEMORY
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Dma.SDIO_RX.0.FIFOMode=DMA_FIFOMODE_ENABLE
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Dma.SDIO_RX.0.FIFOMode=DMA_FIFOMODE_ENABLE
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Dma.SDIO_RX.0.FIFOThreshold=DMA_FIFO_THRESHOLD_FULL
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Dma.SDIO_RX.0.FIFOThreshold=DMA_FIFO_THRESHOLD_FULL
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@@ -47,6 +48,16 @@ Dma.SDIO_TX.1.PeriphDataAlignment=DMA_PDATAALIGN_WORD
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Dma.SDIO_TX.1.PeriphInc=DMA_PINC_DISABLE
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Dma.SDIO_TX.1.PeriphInc=DMA_PINC_DISABLE
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Dma.SDIO_TX.1.Priority=DMA_PRIORITY_LOW
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Dma.SDIO_TX.1.Priority=DMA_PRIORITY_LOW
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Dma.SDIO_TX.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,FIFOThreshold,MemBurst,PeriphBurst
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Dma.SDIO_TX.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,FIFOThreshold,MemBurst,PeriphBurst
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Dma.USART1_TX.2.Direction=DMA_MEMORY_TO_PERIPH
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Dma.USART1_TX.2.FIFOMode=DMA_FIFOMODE_DISABLE
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Dma.USART1_TX.2.Instance=DMA2_Stream7
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Dma.USART1_TX.2.MemDataAlignment=DMA_MDATAALIGN_BYTE
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Dma.USART1_TX.2.MemInc=DMA_MINC_ENABLE
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Dma.USART1_TX.2.Mode=DMA_NORMAL
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Dma.USART1_TX.2.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
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Dma.USART1_TX.2.PeriphInc=DMA_PINC_DISABLE
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Dma.USART1_TX.2.Priority=DMA_PRIORITY_LOW
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Dma.USART1_TX.2.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
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FREERTOS.FootprintOK=true
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FREERTOS.FootprintOK=true
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FREERTOS.IPParameters=Tasks01,configUSE_NEWLIB_REENTRANT,FootprintOK
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FREERTOS.IPParameters=Tasks01,configUSE_NEWLIB_REENTRANT,FootprintOK
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FREERTOS.Tasks01=DefaultTask,49,128,can_listen,Default,NULL,Dynamic,NULL,NULL
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FREERTOS.Tasks01=DefaultTask,49,128,can_listen,Default,NULL,Dynamic,NULL,NULL
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@@ -96,6 +107,7 @@ MxDb.Version=DB.6.0.170
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NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
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NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
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NVIC.DMA2_Stream3_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
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NVIC.DMA2_Stream3_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
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NVIC.DMA2_Stream6_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
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NVIC.DMA2_Stream6_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
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NVIC.DMA2_Stream7_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
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NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
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NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
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NVIC.ForceEnableDMAVector=true
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NVIC.ForceEnableDMAVector=true
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NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
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NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
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Reference in New Issue
Block a user