From 23f2cfea4ea875b86852471df62726e397734011 Mon Sep 17 00:00:00 2001
From: Erick <ahmederick00@gmail.com>
Date: Fri, 4 Mar 2022 01:40:12 +0100
Subject: [PATCH] Update README.md

---
 README.md | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/README.md b/README.md
index 43da1e0..3c66ab1 100644
--- a/README.md
+++ b/README.md
@@ -9,8 +9,8 @@ Most of the gates also have a 16-bit version and eventually a n-way version (som
 
 Ex: a 4-way mux gate:
 '''
-'include "mux.v";
-'include "or4way.v";
+include "mux.v";
+include "or4way.v";
 
 module mux4way(out, i0, i1, i2, i3, sel0, sel1);
     input i0, i1, i2, i3;
@@ -42,7 +42,7 @@ Testbenches are a way to test the implementation of a particular gate using a Ve
 
 Ex: testbench for a xor gate:
 '''
-'include "gates/predefined/xor_gate.v"
+include "gates/predefined/xor_gate.v"
 
 module xor_tb();
     reg ta, tb;