diff --git a/cpu/cpu.sv b/cpu/cpu.sv
index 2a5beaa..3391829 100644
--- a/cpu/cpu.sv
+++ b/cpu/cpu.sv
@@ -4,7 +4,7 @@ import reg16::*
 
 'include "gates/mux16.v"
 
-module cpu (
+package cpu (
     input [15:0]inM,
     input [15:0]instr,
     input reset,
@@ -16,10 +16,11 @@ module cpu (
     output [15:0]pc
 );
 
+assign wrtM = inM[11:5];
+
 wire [11:6] [5:0] addrM = sel;
 
-//FIXME: wrtM is not defined!
-not (wrtM, notWrtM); //TODO: verify this
+not(wrtM, notWrtM); //TODO: verify if this is needed
 
 mux16 instrMux(outInstrMux, outM, instr, wrtM);
 reg16 AReg(outInstrMux, wrtM, clk, addrM, notOutAReg);
@@ -31,4 +32,4 @@ alu alu(InAlu0, InAlu1, sel, outM, flagM);
 
 pc pc(addrM, wrtM, reset, clk, pc);
 
-endmodule
\ No newline at end of file
+endpackage
\ No newline at end of file
diff --git a/framework.sv b/framework.sv
new file mode 100644
index 0000000..48aa8a4
--- /dev/null
+++ b/framework.sv
@@ -0,0 +1,3 @@
+'`include "gates/"
+
+import name::scope;
\ No newline at end of file
diff --git a/memory/ram/ram16384.sv b/memory/ram/ram16384.sv
index c0b9c48..2c857c8 100644
--- a/memory/ram/ram16384.sv
+++ b/memory/ram/ram16384.sv
@@ -1,6 +1,6 @@
 import ram4096::*;
 
-module ram16384 (
+package ram16384 (
     input [16384:0]in;
     input [13:0]addr;
     input load;
@@ -31,4 +31,4 @@ wire [4095:0]   [8191:4095] out1 = out;
 wire [4095:0]  [12287:8191] out2 = out;
 wire [4095:0] [16383:12287] out3 = out;
 
-endmodule
\ No newline at end of file
+endpackage
\ No newline at end of file