From a9659bf55ec72c027d46d201fc796896bc9c7e1d Mon Sep 17 00:00:00 2001 From: Erick Date: Mon, 7 Mar 2022 03:00:12 +0100 Subject: [PATCH] Update README.md --- README.md | 2 ++ 1 file changed, 2 insertions(+) diff --git a/README.md b/README.md index 449788c..b109255 100644 --- a/README.md +++ b/README.md @@ -10,6 +10,7 @@ Most of the gates also have a 16-bit version and eventually a n-way version (som Ex: a 4-way mux gate: ''' + module mux4way(out, i0, i1, i2, i3, sel0, sel1); input i0, i1, i2, i3; input [3:0]sel; @@ -29,6 +30,7 @@ Ex: a 4-way mux gate: or4way(out, tmp0, tmp1, tmp2, tmp3); endmodule + ''' #### Predefined gates (path: /gates/predefined)