minor changes

2022-03-27 14:37:02 +02:00
parent f078ff9552
commit c3d48c6241
2 changed files with 6 additions and 8 deletions
@@ -1,7 +1,5 @@
 import d_flipflop::*;

-`include "not16.v"
-
 package pc (
    input [15:0]in;
    input load;
@@ -12,14 +10,14 @@ package pc (
 );

 wire [15:0] zero16 = 15'b0000000000000000;
-wire [15:0] one16 =  15'b0000000000000001;
+wire [15:0] oneplus16 =  15'b0000000000000001;

 if (reset == 1)
    out = zero16;
 else if (load == 1)
    out = in;
 else if (inc == 1)
-    out = out + one16;
+    out = out + oneplus16;
 else
    out = out;
 end