From e24c4ee591d9243271ba5a41399cf60b85488015 Mon Sep 17 00:00:00 2001
From: Erick Ahmed <engineering@erickahmed.com>
Date: Fri, 9 Jan 2026 11:40:24 +0100
Subject: [PATCH] Add register usage comment

---
 src/timer.inc | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/src/timer.inc b/src/timer.inc
index 0f65ac3..99587d1 100644
--- a/src/timer.inc
+++ b/src/timer.inc
@@ -1,6 +1,11 @@
-; Registers:
-;   r16: timer0 setup (can reuse after ret)
-;   r17: timer1 dynamic setup (always needed)
+; Register usage:
+;   (r1 = 0; r1 = 1)
+;   r16     -> everything related to timer0 and led blinking
+;   r17:r18 -> 16-bit accumulator (r17 = low byte, r18 = high byte)
+;   r19:r20 -> 16-bit BPM target (r19 = low byte, r20 = high byte);
+;
+;   r19 -> quantization; how often the ISR runs (affects: jitter, cpu load)
+;   r21 -> phase resolution (affects: fractional BPM values, error distribution)
 
 timer0_set:
     out     TCCR0A,     r0                          ; T/C Control Register A enable normal mode