diff --git a/src/timer.inc b/src/timer.inc new file mode 100644 index 0000000..a6edc8e --- /dev/null +++ b/src/timer.inc @@ -0,0 +1,26 @@ +#define __SFR_OFFSET 0 +#include + +; Timer0 will be static and used for the led +timer0_set: + ldi r16, (1 << WGM01) ; Load 00000010 to register (bit 1=CTC) + out TCCR0A, r16 ; On T/C Control Register A, enable CTC and COM0A0 + + ldi r16, 244 ; Load counter target limit value (ticks) + out OCR0A, r16 ; Compare target to current counter + +; Timer1 will be dynamically changed in main +timer1_ld: + ; Load 10011011 to register: + ; CTC1 (Bit 7): Reset timer to 0 when it matches OCR1C + ; COM1A0 (Bit 4): Toggle OC1A (PB1) when it matches OCR1A + ; CS13, CS11, CS10 (Bits 3,1,0): Prescaler 1024 (1011) + ldi r16, (1 << CTC1) | (1 << COM1A0) | (1 << CS13) | (1 << CS11) | (1 << CS10) + out TCCR1, r16 ; On T/C Control Register 1, enable: CTC1 COM1A0 CS13 CS11 CS10 + +timer1_set: + ldi r16, 256 ; Load counter total value (ticks) + ldi r16, 5 ; Load counter on value (ticks) + ; //TODO: change r16 on main and then call timer1_dyn to use the value already on r16 (so its dynamic) + out OCR1C, r16 ; Compare target to current counter (frequency) + out OCR1A, r16 ; Compare target to current counter (phase shift)