From ad13f51765499f2b39b1861510ab852c1e39c0d8 Mon Sep 17 00:00:00 2001 From: Erick Date: Sun, 13 Feb 2022 22:59:43 +0100 Subject: [PATCH] variable name change --- src/registers.c | 66 +++++++++++++++++++++++++------------------------ src/tyvm.c | 62 +++++++++++++++++++++++----------------------- 2 files changed, 65 insertions(+), 63 deletions(-) diff --git a/src/registers.c b/src/registers.c index 6d95be2..89e557d 100644 --- a/src/registers.c +++ b/src/registers.c @@ -1,22 +1,24 @@ +#include "preprocessor.c" + /* initialization of registers and memory /* memory mapped register tables */ enum mmr { - MMR_KSR = 0xFE00, // keyboard status - MMR_KDR = 0xFE02 // keyboard data + MR_KSR = 0xFE00, // keyboard status + MR_KDR = 0xFE02 // keyboard data }; /* Initializing 10 registers of which: 8 general purpose, 1 program counter, 1 conditional */ enum registers { - R0 = 0, - R1, - R2, - R3, - R4, - R5, - R6, - R7, + RG_R0 = 0, + RG_R1, + RG_R2, + RG_R3, + RG_R4, + RG_R5, + RG_R6, + RG_R7, RG_PC, // program counter RG_COND, // condition flag RG_COUNT @@ -24,32 +26,32 @@ enum registers { /* Creating instruction set opcodes */ enum opcodes { // [name, 8-bit value] - BR = 0, // branch, 0000 - ADD, // add, 0001 - LD, // load, 0010 - ST, // store, 0011 - JSR, // jump register, 0100 - AND, // bitwise and, 0101 - LDR, // load register, 0110 - STR, // store register, 0111 - RTI, // unused opcode - NOT, // bitwise not, 1001 - LDI, // indirect load, 1010 - STI, // indirect store, 1011 - JMP, // jump, 1100 - RES, // reserved opcode, - LEA, // load effective address, 1110 - TRAP, // execute trap, 1111 + OP_BR = 0, // branch, 0000 + OP_ADD, // add, 0001 + OP_LD, // load, 0010 + OP_ST, // store, 0011 + OP_JSR, // jump register, 0100 + OP_AND, // bitwise and, 0101 + OP_LDR, // load register, 0110 + OP_STR, // store register, 0111 + OP_RTI, // unused opcode + OP_NOT, // bitwise not, 1001 + OP_LDI, // indirect load, 1010 + OP_STI, // indirect store, 1011 + OP_JMP, // jump, 1100 + OP_RES, // reserved opcode, + OP_LEA, // load effective address, 1110 + OP_TRAP, // execute trap, 1111 }; /* Trap codes used for OP_TRAP */ enum trapcodes { - GETC = 0x20, // get charcter from keyboard - OUTP = 0x21, // output a character - PUTS = 0x22, // output a word string - INP = 0x23, // get charcter from keyboard and echo to terminal - PUTSP = 0x24, // output a byte string - HALT = 0x25 // halt program + TC_GETC = 0x20, // get charcter from keyboard + TC_OUT = 0x21, // output a character + TC_PUTS = 0x22, // output a word string + TC_IN = 0x23, // get charcter from keyboard and echo to terminal + TC_PUTSP = 0x24, // output a byte string + TC_HALT = 0x25 // halt program }; /* Creating condition flags */ diff --git a/src/tyvm.c b/src/tyvm.c index bea3490..b82e677 100644 --- a/src/tyvm.c +++ b/src/tyvm.c @@ -4,7 +4,7 @@ Open-source software distributed under GNU GPL v.3 license */ -#include "preprocessor.h" +#include "preprocessor.c" #include "registers.c" #include "lc3_lib.h" @@ -29,8 +29,8 @@ int main(int argc, const char* argv[]) { int running = TRUE; while(running) { - static uint16_t instr = mem_read(reg[RG_PC]++); - static uint16_t op = instr >> 12; + const uint16_t instr = mem_read(reg[RG_PC]++); + const uint16_t op = instr >> 12; static uint16_t cond; // condition flag status static uint16_t PCoffset9; // 9-bit value that indicates where to load the address when added to PC register @@ -52,14 +52,14 @@ int main(int argc, const char* argv[]) { static uint16_t* ch; switch (op) { - case BR: + case OP_BR: cond = (instr >> 9) & 0x7; PCoffset9 = sign_extend(instr & 0x1FF, 9); if(cond & reg[RG_COND]) reg[RG_PC] += PCoffset9; break; - case ADD: + case OP_ADD: dr = (instr >> 9) & 0x7; sr1 = (instr >> 6) & 0x7; imm_flag = (instr >> 5) & 0x1; @@ -75,7 +75,7 @@ int main(int argc, const char* argv[]) { update_flags(dr); break; - case LD: + case OP_LD: dr = (instr >> 9) & 0x7; PCoffset9 = sign_extend(instr & 0x1FF, 9); @@ -84,7 +84,7 @@ int main(int argc, const char* argv[]) { update_flags(dr); break; - case ST: + case OP_ST: sr = (instr >> 6) & 0x7; PCoffset9 = sign_extend(instr & 0x1FF, 9); // 9-bit value that indicates where to load the address when added to RG_PC @@ -93,7 +93,7 @@ int main(int argc, const char* argv[]) { update_flags(dr); break; - case JSR: + case OP_JSR: PCoffset11 = sign_extend(instr & 0x1FF, 11); jsr_flag = (instr >> 11) & 0x1; BaseR_jsrr = (instr >> 6) & 0x7; // JSRR only ecoding @@ -102,7 +102,7 @@ int main(int argc, const char* argv[]) { else reg[RG_PC] += PCoffset11; // JSR break; - case AND: + case OP_AND: dr = (instr >> 9) & 0x7; sr1 = (instr >> 6) & 0x7; imm_flag = (instr >> 5) & 0x1; @@ -118,7 +118,7 @@ int main(int argc, const char* argv[]) { update_flags(dr); break; - case LDR: + case OP_LDR: dr = (instr >> 9) & 0x7; BaseR = (instr >> 6) & 0x7; offset6 = sign_extend(instr & 0x3FF, 6); @@ -128,7 +128,7 @@ int main(int argc, const char* argv[]) { update_flags(dr); break; - case STR: + case OP_STR: sr = (instr >> 6) & 0x7; BaseR = (instr >> 6) & 0x7; offset6 = sign_extend(instr & 0x1FF, 6); @@ -138,7 +138,7 @@ int main(int argc, const char* argv[]) { update_flags(dr); break; - case NOT: + case OP_NOT: dr = (instr >> 9) & 0x7; // destination register sr = (instr >> 6) & 0x7; // source register @@ -147,7 +147,7 @@ int main(int argc, const char* argv[]) { update_flags(dr); break; - case LDI: + case OP_LDI: dr = (instr >> 9) & 0x7; PCoffset9 = sign_extend(instr & 0x1FF, 9); @@ -156,7 +156,7 @@ int main(int argc, const char* argv[]) { update_flags(dr); break; - case STI: + case OP_STI: sr = (instr >> 6) & 0x7; PCoffset9 = sign_extend(instr & 0x1FF, 9); // 9-bit value that indicates where to load the address when added to RG_PC @@ -165,7 +165,7 @@ int main(int argc, const char* argv[]) { update_flags(dr); break; - case JMP: + case OP_JMP: BaseR = (instr >> 6) & 0x7; reg[RG_PC] = reg[BaseR]; @@ -173,7 +173,7 @@ int main(int argc, const char* argv[]) { update_flags(dr); break; - case LEA: + case OP_LEA: dr = (instr >> 9) & 0x7; PCoffset9 = sign_extend(instr & 0x1FF, 9); @@ -182,17 +182,17 @@ int main(int argc, const char* argv[]) { update_flags(dr); break; - case TRAP: + case OP_TRAP: switch(instr & 0xFF) { - case GETC: - reg[R0] = (uint16_t)getchar(); + case TC_GETC: + reg[RG_R0] = (uint16_t)getchar(); break; - case OUTP: - putc((char)reg[R0], stdout); + case TC_OUT: + putc((char)reg[RG_R0], stdout); fflush(stdout); break; - case PUTS: - stringPnt = memory + reg[R0]; + case TC_PUTS: + stringPnt = memory + reg[RG_R0]; while (*c) { putc((char)*c, stdout); @@ -201,18 +201,18 @@ int main(int argc, const char* argv[]) { fflush(stdout); break; - case INP: + case TC_IN: printf("Enter a character: "); char c = getchar(); putc(c, stdout); fflush(stdout); - reg[R0] = (uint16_t)c; - update_flags(R0); + reg[RG_R0] = (uint16_t)c; + update_flags(RG_R0); break; - case PUTSP: - ch = memory + reg[R0]; + case TC_PUTSP: + ch = memory + reg[RG_R0]; while (*ch) { char char1 = (*ch) & 0xFF; putc(char1, stdout); @@ -223,7 +223,7 @@ int main(int argc, const char* argv[]) { fflush(stdout); break; - case HALT: + case TC_HALT: puts("HALT"); fflush(stdout); running = FALSE; @@ -234,8 +234,8 @@ int main(int argc, const char* argv[]) { break; } break; - case RES: // reserved - case RTI: // unused + case OP_RES: // reserved + case OP_RTI: // unused default: abort(); break;