170 lines
4.9 KiB
C
170 lines
4.9 KiB
C
#include <common.h>
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#include <command.h>
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#include <asm/mipsregs.h>
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#include <asm/addrspace.h>
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#include <config.h>
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#include <version.h>
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#include <atheros.h>
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extern int ath_ddr_initial_config(uint32_t refresh);
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extern int ath_ddr_find_size(void);
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#ifdef COMPRESSED_UBOOT
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# define prmsg(...)
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# define args char *s
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# define board_str(a) do { \
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char ver[] = "0"; \
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strcpy(s, a " - Scorpion 1."); \
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ver[0] += ath_reg_rd(RST_REVISION_ID_ADDRESS) \
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& 0xf; \
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strcat(s, ver); \
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} while (0)
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#else
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# define prmsg printf
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# define args void
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# define board_str(a) \
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printf(a " - Scorpion 1.%d\n", ath_reg_rd \
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(RST_REVISION_ID_ADDRESS) & 0xf)
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#endif
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void
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ath_usb1_initial_config(void)
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{
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#define unset(a) (~(a))
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ath_reg_wr_nf(SWITCH_CLOCK_SPARE_ADDRESS,
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ath_reg_rd(SWITCH_CLOCK_SPARE_ADDRESS) |
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SWITCH_CLOCK_SPARE_USB_REFCLK_FREQ_SEL_SET(5));
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udelay(1000);
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ath_reg_rmw_set(RST_RESET_ADDRESS,
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RST_RESET_USB_PHY_SUSPEND_OVERRIDE_SET(1));
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udelay(1000);
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ath_reg_rmw_clear(RST_RESET_ADDRESS, RST_RESET_USB_PHY_RESET_SET(1));
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udelay(1000);
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ath_reg_rmw_clear(RST_RESET_ADDRESS, RST_RESET_USB_PHY_ARESET_SET(1));
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udelay(1000);
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ath_reg_rmw_clear(RST_RESET_ADDRESS, RST_RESET_USB_HOST_RESET_SET(1));
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udelay(1000);
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ath_reg_rmw_clear(RST_RESET_ADDRESS, RST_RESET_USB_PHY_PLL_PWD_EXT_SET(1));
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udelay(10);
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ath_reg_rmw_set(RST_RESET2_ADDRESS, RST_RESET2_USB1_EXT_PWR_SEQ_SET(1));
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udelay(10);
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}
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void
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ath_usb2_initial_config(void)
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{
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if (is_drqfn()) {
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return;
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}
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ath_reg_rmw_set(RST_RESET2_ADDRESS, RST_RESET2_USB2_MODE_SET(1));
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udelay(10);
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ath_reg_rmw_set(RST_RESET2_ADDRESS,
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RST_RESET2_USB_PHY2_SUSPEND_OVERRIDE_SET(1));
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udelay(1000);
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ath_reg_rmw_clear(RST_RESET2_ADDRESS, RST_RESET2_USB_PHY2_RESET_SET(1));
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udelay(1000);
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ath_reg_rmw_clear(RST_RESET2_ADDRESS, RST_RESET2_USB_PHY2_ARESET_SET(1));
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udelay(1000);
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ath_reg_rmw_clear(RST_RESET2_ADDRESS, RST_RESET2_USB_HOST2_RESET_SET(1));
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udelay(1000);
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ath_reg_rmw_clear(RST_RESET2_ADDRESS, RST_RESET2_USB_PHY2_PLL_PWD_EXT_SET(1));
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udelay(10);
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ath_reg_rmw_set(RST_RESET2_ADDRESS, RST_RESET2_USB2_EXT_PWR_SEQ_SET(1));
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udelay(10);
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}
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void ath_gpio_config(void)
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{
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#if defined(CONFIG_BOARD_NBG6716) || defined(CONFIG_BOARD_NBG6616)
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/* set GPIO 4,12,13,15,16,17,18,19 as output */
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ath_reg_rmw_clear(GPIO_OE_ADDRESS, \
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((1 << 4)|(1 << 12)|(1 << 13)|(1 << 15)|(1 << 16)|(1 << 17)|(1 << 18)|(1 << 19)));
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ath_reg_rmw_clear(GPIO_OUT_FUNCTION1_ADDRESS, GPIO_OUT_FUNCTION1_ENABLE_GPIO_4_MASK);
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ath_reg_rmw_clear(GPIO_OUT_FUNCTION3_ADDRESS, \
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(GPIO_OUT_FUNCTION3_ENABLE_GPIO_12_MASK| \
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GPIO_OUT_FUNCTION3_ENABLE_GPIO_13_MASK| \
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GPIO_OUT_FUNCTION3_ENABLE_GPIO_15_MASK));
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ath_reg_rmw_clear(GPIO_OUT_FUNCTION4_ADDRESS, \
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(GPIO_OUT_FUNCTION4_ENABLE_GPIO_16_MASK| \
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GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_MASK| \
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GPIO_OUT_FUNCTION4_ENABLE_GPIO_18_MASK| \
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GPIO_OUT_FUNCTION4_ENABLE_GPIO_19_MASK));
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ath_reg_wr_nf(GPIO_SET_ADDRESS, \
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((1 << 4)|(1 << 12)|(1 << 13)|(1 << 15)|(1 << 16)|(1 << 17)|(1 << 18)|(1 << 19)));
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#if defined(CONFIG_BOARD_NBG6616)
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/* disable JTAG */
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ath_reg_rmw_set(GPIO_FUNCTION_ADDRESS, 2);
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/* Set GPIO 0 as output */
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ath_reg_rmw_clear(GPIO_OE_ADDRESS, 1);
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/* turn off USB2 LED */
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ath_reg_wr_nf(GPIO_SET_ADDRESS, 1);
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#endif
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#else
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/* disable the CLK_OBS on GPIO_4 and set GPIO4 as input */
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ath_reg_rmw_clear(GPIO_OE_ADDRESS, (1 << 4));
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ath_reg_rmw_clear(GPIO_OUT_FUNCTION1_ADDRESS, GPIO_OUT_FUNCTION1_ENABLE_GPIO_4_MASK);
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ath_reg_rmw_set(GPIO_OUT_FUNCTION1_ADDRESS, GPIO_OUT_FUNCTION1_ENABLE_GPIO_4_SET(0x80));
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ath_reg_rmw_set(GPIO_OE_ADDRESS, (1 << 4));
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/* Set GPIO 13 as input for LED functionality to be OFF during bootup */
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ath_reg_rmw_set(GPIO_OE_ADDRESS, (1 << 13));
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/* Turn off JUMPST_LED and 5Gz LED during bootup */
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ath_reg_rmw_set(GPIO_OE_ADDRESS, (1 << 15));
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ath_reg_rmw_set(GPIO_OE_ADDRESS, (1 << 12));
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#endif
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}
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int
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ath_mem_config(void)
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{
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unsigned int type, reg32, *tap;
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extern uint32_t *ath_ddr_tap_cal(void);
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#if !defined(CONFIG_ATH_EMULATION)
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#if !(defined(CONFIG_ATH_NAND_BR)||defined(CONFIG_SKIP_LOWLEVEL_INIT))
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type = ath_ddr_initial_config(CFG_DDR_REFRESH_VAL);
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tap = ath_ddr_tap_cal();
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// prmsg("tap = 0x%p\n", tap);
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tap = (uint32_t *)0xbd007f10;
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// prmsg("Tap (low, high) = (0x%x, 0x%x)\n", tap[0], tap[1]);
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tap = (uint32_t *)TAP_CONTROL_0_ADDRESS;
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// prmsg("Tap values = (0x%x, 0x%x, 0x%x, 0x%x)\n", \
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tap[0], tap[2], tap[2], tap[3]);
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/* Take WMAC out of reset */
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reg32 = ath_reg_rd(RST_RESET_ADDRESS);
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reg32 = reg32 & ~RST_RESET_RTC_RESET_SET(1);
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ath_reg_wr_nf(RST_RESET_ADDRESS, reg32);
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#endif
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#if 1 /* must do it because linux kernel(atheros SDK) doesn't configure USB interface */
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ath_usb1_initial_config();
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ath_usb2_initial_config();
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#endif
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ath_gpio_config();
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#endif /* !defined(CONFIG_ATH_EMULATION) */
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return ath_ddr_find_size();
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}
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phys_size_t initdram(int board_type)
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{
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return (ath_mem_config());
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}
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int checkboard(args)
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{
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board_str(CONFIG_BOARD_NAME);
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return 0;
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}
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