63 lines
1.9 KiB
C
63 lines
1.9 KiB
C
/*
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* (C) Copyright 2003
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* Wolfgang Denk, DENX Software Engineering, <wd@denx.de>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <command.h>
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#include <asm/mipsregs.h>
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#include <asm/arch/rt_mmap.h>
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#if defined(RT6855A_FPGA_BOARD) || defined(RT6855A_ASIC_BOARD)
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int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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{
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ra_outl(RALINK_TIMER_BASE + 0x2c, 0x1); //timer3 load value
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ra_or(RALINK_TIMER_BASE, (1 << 5) | (1 << 25)); //timer3 enabled as watchdog
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return 1;
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}
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#else
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#define SOFTRES_REG (RALINK_SYSCTL_BASE + 0x0034)
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#define GORESET (0x01)
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int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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{
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*(volatile unsigned int*)(SOFTRES_REG) = GORESET;
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return 1;
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}
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#endif
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void flush_cache (ulong start_addr, ulong size)
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{
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}
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#ifdef RT2880_U_BOOT_CMD_OPEN
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void write_one_tlb( int index, u32 pagemask, u32 hi, u32 low0, u32 low1 ){
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write_32bit_cp0_register(CP0_ENTRYLO0, low0);
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write_32bit_cp0_register(CP0_PAGEMASK, pagemask);
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write_32bit_cp0_register(CP0_ENTRYLO1, low1);
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write_32bit_cp0_register(CP0_ENTRYHI, hi);
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write_32bit_cp0_register(CP0_INDEX, index);
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tlb_write_indexed();
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}
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#endif
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