152 lines
5.4 KiB
C
152 lines
5.4 KiB
C
/*
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***************************************************************************
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* Ralink Tech Inc.
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* 4F, No. 2 Technology 5th Rd.
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* Science-based Industrial Park
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* Hsin-chu, Taiwan, R.O.C.
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*
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* (c) Copyright, Ralink Technology, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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*
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***************************************************************************
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*/
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#ifndef __RT2880_GPIO_H__
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#define __RT2880_GPIO_H__
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#include <asm/arch/rt_mmap.h>
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#define RALINK_GPIO_LED_LOW_ACT 1
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#define GPIO_TRACE_NONE 0
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#define GPIO_TRACE_IO 1
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#define GPIO_TRACE_INT 2
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#define GPIO_TRACE_ALL 3
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/*
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* ioctl commands
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*/
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#define RALINK_GPIO_SET_DIR 0x01
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#define RALINK_GPIO_SET_DIR_IN 0x11
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#define RALINK_GPIO_SET_DIR_OUT 0x12
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#define RALINK_GPIO_READ 0x02
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#define RALINK_GPIO_WRITE 0x03
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#define RALINK_GPIO_SET 0x21
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#define RALINK_GPIO_CLEAR 0x31
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#define RALINK_GPIO_READ_BIT 0x04
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#define RALINK_GPIO_WRITE_BIT 0x05
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#define RALINK_GPIO_READ_BYTE 0x06
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#define RALINK_GPIO_WRITE_BYTE 0x07
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#define RALINK_GPIO_READ_INT 0x02 //same as read
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#define RALINK_GPIO_WRITE_INT 0x03 //same as write
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#define RALINK_GPIO_SET_INT 0x21 //same as set
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#define RALINK_GPIO_CLEAR_INT 0x31 //same as clear
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#define RALINK_GPIO_ENABLE_INTP 0x08
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#define RALINK_GPIO_DISABLE_INTP 0x09
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#define RALINK_GPIO_REG_IRQ 0x0A
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#define RALINK_GPIO_LED_SET 0x41
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#define RALINK_GPIO3116_SET_DIR 0x51
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#define RALINK_GPIO3116_SET_DIR_IN 0x13
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#define RALINK_GPIO3116_SET_DIR_OUT 0x14
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/*
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* Address of RALINK_ Registers
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*/
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#define RALINK_SYSCTL_ADDR RALINK_SYSCTL_BASE // system control
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#define RALINK_REG_RSTCTRL2 (RALINK_SYSCTL_ADDR + 0x834) // RSTCTRL2
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#define RALINK_REG_GPIOMODE (RALINK_SYSCTL_ADDR + 0x860) // GPIO share scheme
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#define RALINK_IRQ_ADDR RALINK_INTCL_BASE
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#define RALINK_REG_INTENA (RALINK_IRQ_ADDR + 0x04) // IMR
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#define RALINK_REG_INTDIS RALINK_REG_INTENA // IMR
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#define RALINK_PRGIO_ADDR RALINK_PIO_BASE // Programmable I/O
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#define RALINK_REG_PIODIR (RALINK_PRGIO_ADDR + 0x0) // GPIOCTRL
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#define RALINK_REG_PIODATA (RALINK_PRGIO_ADDR + 0x04) // GPIODATA
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#define RALINK_REG_PIOINT (RALINK_PRGIO_ADDR + 0x08) // GPIOINT
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#define RALINK_REG_PIOEDGE (RALINK_PRGIO_ADDR + 0x0C) // GPIOINTEDG
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#define RALINK_REG_GPIOOE (RALINK_PRGIO_ADDR + 0x14)
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#define RALINK_REG_PIO3116DIR (RALINK_PRGIO_ADDR + 0x20) // GPIOCTRL1
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#define RALINK_REG_SGPIOLEDDATA (RALINK_PRGIO_ADDR + 0x24)
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/*
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* Values for the GPIOMODE Register
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*/
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#define RALINK_GPIOMODE_PCM 0x01 // GPIO_PCM
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#define RALINK_GPIOMODE_SPICS1 0x02 // GPIO_SPI_CS1_N
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#define RALINK_GPIOMODE_SPICS2 0x04 // GPIO_SPI_CS2_N
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#define RALINK_GPIOMODE_SPICS3 0x08 // GPIO_SPI_CS3_N
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#define RALINK_GPIOMODE_SPICS4 0x10 // GPIO_SPI_CS4_N
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#define RALINK_GPIOMODE_SPICS5 0x20 // GPIO_SPI_CS5_N
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#define RALINK_GPIOMODE_UARTF 0x40 // GPIO_UART2
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#define RALINK_GPIOMODE_I2S 0x80 // GPIO_I2S
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#define RALINK_GPIOMODE_NFD 0x100 // GPIO_NFD_DATA_BUS
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#define RALINK_GPIOMODE_EPHY0 0x200 // GPIO_EPHY_LED0
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#define RALINK_GPIOMODE_EPHY1 0x400 // GPIO_EPHY_LED1
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#define RALINK_GPIOMODE_EPHY2 0x800 // GPIO_EPHY_LED2
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#define RALINK_GPIOMODE_EPHY3 0x1000 // GPIO_EPHY_LED3
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#define RALINK_GPIOMODE_EPHY4 0x2000 // GPIO_EPHY_LED4
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#define RALINK_GPIOMODE_I2C 0x8000 // GPIO_I2C
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// if you would like to enable GPIO mode for other pins, please modify this value
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// !! Warning: changing this value may make other features(MDIO, PCI, etc) lose efficacy
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#define RALINK_GPIOMODE_DFT (RALINK_GPIOMODE_UARTF)
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/*
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* bit is the unit of length
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*/
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#if defined (CONFIG_RT6855A_PCIE_PORT0_ENABLE)
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#define RALINK_GPIO_NUMBER 33
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#else
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#define RALINK_GPIO_NUMBER 32
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#endif
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#define RALINK_GPIO_DATA_MASK 0x00FFFFFF
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#define RALINK_GPIO_DATA_LEN 32
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#define RALINK_GPIO_DIR_IN 0
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#define RALINK_GPIO_DIR_OUT 1
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#define RALINK_GPIO_DIR_ALLIN 0
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#define RALINK_GPIO_DIR_ALLOUT 0x00FFFFFF
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/*
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* structure used at regsitration
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*/
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typedef struct {
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unsigned int irq; //request irq pin number
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pid_t pid; //process id to notify
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} ralink_gpio_reg_info;
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#define RALINK_GPIO_LED_INFINITY 4000
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typedef struct {
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int gpio; //gpio number (0 ~ 23)
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unsigned int on; //interval of led on
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unsigned int off; //interval of led off
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unsigned int blinks; //number of blinking cycles
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unsigned int rests; //number of break cycles
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unsigned int times; //blinking times
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} ralink_gpio_led_info;
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#define RALINK_GPIO(x) (1 << x)
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#endif
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