123 lines
2.7 KiB
C
123 lines
2.7 KiB
C
/*
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* Copyright Codito Technologies (www.codito.com)
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*
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* board/aa3/aa3.c
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*
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* Copyright (C)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Authors : Sandeep Patil (sandeep.patil@codito.com)
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* Pradeep Sawlani (pradeep.sawlani@codito.com)
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*/
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#include <asm/arcregs.h>
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#include <linux/types.h>
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#include <config.h>
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#include <asm/global_data.h> /* For global data structre */
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#include <asm/sys_ctrl.h>
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#define TIMER0_LIMIT 0xffffffff /* Maximum limit for timer */
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static ulong timestamp;
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#ifdef CONFIG_ARC_SYS_CTRL_DEV
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static sys_ctrl_reg_t *sys_ctrl_dev = SYS_CTRL_DEVICE_ADDRESS;
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#endif
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/* Function to start timer from 'count' */
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void set_timer (ulong count)
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{
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/* Set up the LIMIT0 , COUNT0 and CONTROL0 registers for timer 0 without interrupt */
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write_new_aux_reg(ARC_REG_TIMER0_CTRL, 0);
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write_new_aux_reg(ARC_REG_TIMER0_LIMIT, TIMER0_LIMIT);
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write_new_aux_reg(ARC_REG_TIMER0_CTRL, 2);
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write_new_aux_reg(ARC_REG_TIMER0_CNT, count);
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}
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/* Function to get the current count value */
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ulong get_timer (ulong base)
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{
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/* Read the count value from COUNT0 */
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timestamp = read_new_aux_reg(ARC_REG_TIMER0_CNT);
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return timestamp - base;
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}
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void reset_timer(void)
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{
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set_timer(0);
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}
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void uninit_timer(void)
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{
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write_new_aux_reg(ARC_REG_TIMER0_LIMIT,0xffffff);
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write_new_aux_reg(ARC_REG_TIMER0_CNT,0);
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write_new_aux_reg(ARC_REG_TIMER0_CTRL,0);
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}
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/* Delay function */
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void udelay (unsigned long usec)
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{
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DECLARE_GLOBAL_DATA_PTR;
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ulong uTicks;
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set_timer(0);
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uTicks = (gd->cpu_clk/1000000) * usec;
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/* Continue looping till the timer count is more thean the required delay */
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while(get_timer(0) < uTicks);
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}
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void show_boot_progress (int status)
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{
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#ifdef CONFIG_ARC_SYS_CTRL_DEV
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sys_ctrl_dev->leds = status;
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#endif
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}
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#ifdef CONFIG_ARC_SYS_CTRL_DEV
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static unsigned read_dip_switches(void)
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{
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return sys_ctrl_dev->dip_switches;
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}
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static unsigned read_clk(void)
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{
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int unsigned sw = read_dip_switches();
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static unsigned clk_tbl[4] = { 95, 85, 75, 65};
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sw >>= 2;
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sw &= 0x3;
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return 1000000 * clk_tbl[sw];
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}
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#else
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static unsigned read_clk(void)
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{
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return CONFIG_ARC_CLK;
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}
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#endif
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void disable_rom(void)
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{
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#ifdef CONFIG_ARC_SYS_CTRL_DEV
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sys_ctrl_dev->mem_cfg1 = 0;
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#endif
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}
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int board_init(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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disable_rom();
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gd->cpu_clk = read_clk();
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reset_timer(); /* Intialise the timer */
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gd->bd->bi_boot_params = TEXT_BASE - CONFIG_SYS_MALLOC_LEN + CONFIG_SYS_ENV_SIZE; /* address of kernel parameters */
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return 0;
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}
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