104 lines
2.6 KiB
C
104 lines
2.6 KiB
C
#include <common.h>
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#include <command.h>
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#include <asm/mipsregs.h>
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#include <asm/addrspace.h>
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#include <config.h>
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#include <version.h>
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#include <atheros.h>
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#ifdef CONFIG_ATH_NAND_BR
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#include <nand.h>
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#endif
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#ifdef CONFIG_ATH_NAND_BR
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void *
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ath_get_nand_cal_data(void)
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{
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extern unsigned long long ath_nand_get_cal_offset(const char *ba);
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ulong off,size;
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int ret;
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static u_char nand_cal_data[256 * 1024];
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nand_info_t *nand;
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/*
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* caldata partition is of 128k
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*
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*/
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nand = &nand_info[nand_curr_device];
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size = nand->erasesize;
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/*
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* Get the Offset of Caldata partition
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*/
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off = ath_nand_get_cal_offset(getenv("bootargs"));
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if(off == ATH_CAL_OFF_INVAL) {
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printf("Invalid CAL offset \n");
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return 1;
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}
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/*
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* Get the values from flash, and program into the MAC address
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* registers
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*/
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ret = nand_read(nand, (loff_t)off, &size, nand_cal_data);
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printf(" %d bytes %s: %s\n", size,
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"read", ret ? "ERROR" : "OK");
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if(ret != 0 ) {
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return NULL;
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}
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return nand_cal_data;
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}
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#endif
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void ath_set_tuning_caps(void)
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{
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typedef struct {
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u_int8_t pad[0x28],
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params_for_tuning_caps[2],
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featureEnable;
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} __attribute__((__packed__)) ar9300_eeprom_t;
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ar9300_eeprom_t *eep;
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uint32_t val;
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#ifdef CONFIG_ATH_NAND_BR
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eep = (ar9300_eeprom_t *)ath_get_nand_cal_data();
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#else
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eep = (ar9300_eeprom_t *)WLANCAL;
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#endif /* CONFIG_ATH_NAND_BR */
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val = XTAL_TCXODET_SET(0x0) |
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XTAL_XTAL_CAPINDAC_SET(0x45) |
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XTAL_XTAL_CAPOUTDAC_SET(0x45) |
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XTAL_XTAL_DRVSTR_SET(0x3) |
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XTAL_XTAL_SHORTXIN_SET(0x0) |
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XTAL_XTAL_LOCALBIAS_SET(0x1) |
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XTAL_XTAL_PWDCLKD_SET(0x0) |
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XTAL_XTAL_BIAS2X_SET(0x0) |
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XTAL_XTAL_LBIAS2X_SET(0x0) |
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XTAL_XTAL_ATBVREG_SET(0x0) |
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XTAL_XTAL_OSCON_SET(0x1) |
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XTAL_XTAL_PWDCLKIN_SET(0x0) |
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XTAL_LOCAL_XTAL_SET(0x1) |
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XTAL_PWD_SWREGCLK_SET(0x0) |
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XTAL_SWREGCLK_EDGE_SEL_SET(0x0) |
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XTAL_SPARE_SET(0xf);
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/* checking feature enable bit 6 and caldata is valid */
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if ((eep->featureEnable & 0x40) && (eep->pad[0x0] != 0xff)) {
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val &= ~(XTAL_XTAL_CAPINDAC_MASK | XTAL_XTAL_CAPOUTDAC_MASK);
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val |= XTAL_XTAL_CAPINDAC_SET(eep->params_for_tuning_caps[0]) |
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XTAL_XTAL_CAPOUTDAC_SET(eep->params_for_tuning_caps[0]);
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}
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ath_reg_wr(XTAL_ADDRESS, val);
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#define __str(x) # x
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#define str(x) __str(x)
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// printf("Setting " str(XTAL_ADDRESS) " to 0x%x\n", val);
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return;
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}
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