NetworkRT (deallocations to be done)
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#include <iostream>
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#include "NvInfer.h"
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#include "NetworkRT.h"
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using namespace nvinfer1;
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// Logger for info/warning/errors
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class Logger : public ILogger
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{
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void log(Severity severity, const char* msg) override
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{
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std::cout <<"TENSORRT: "<< msg << std::endl;
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}
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} loggerRT;
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namespace tkDNN {
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NetworkRT::NetworkRT(Network *net) {
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builderRT = createInferBuilder(loggerRT);
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networkRT = builderRT->createNetwork();
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dtRT = DataType::kFLOAT;
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//add input layer
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dataDim_t dim = net->layers[0]->input_dim;
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ITensor *input = networkRT->addInput("data", dtRT,
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DimsCHW{ dim.c, dim.h, dim.w});
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checkNULL(input);
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//add other layers
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for(int i=0; i<net->num_layers; i++) {
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Layer *l = net->layers[i];
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input = convert_layer(input, l);
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}
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if(input == NULL)
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FatalError("conversion failed");
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output_dim = net->layers[net->num_layers-1]->output_dim;
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//build tensorRT
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input->setName("out");
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networkRT->markOutput(*input);
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// Build the engine
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builderRT->setMaxBatchSize(1);
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builderRT->setMaxWorkspaceSize(1 << 20);
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std::cout<<"BUILD cuda engine\n";
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engineRT = builderRT->buildCudaEngine(*networkRT);
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// we don't need the network any more
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//networkRT->destroy();
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std::cout<<"create execution context\n";
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contextRT = engineRT->createExecutionContext();
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// input and output buffer pointers that we pass to the engine - the engine requires exactly IEngine::getNbBindings(),
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// of these, but in this case we know that there is exactly one input and one output.
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if(engineRT->getNbBindings() != 2)
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FatalError("Incorrect buffers number");
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// In order to bind the buffers, we need to know the names of the input and output tensors.
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// note that indices are guaranteed to be less than IEngine::getNbBindings()
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buf_input_idx = engineRT->getBindingIndex("data");
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buf_output_idx = engineRT->getBindingIndex("out");
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std::cout<<"input idex = "<<buf_input_idx<<" -> output index = "<<buf_output_idx<<"\n";
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// create GPU buffers and a stream
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checkCuda(cudaMalloc(&buffersRT[buf_input_idx], dim.tot()*sizeof(value_type)));
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checkCuda(cudaMalloc(&buffersRT[buf_output_idx], output_dim.tot()*sizeof(value_type)));
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checkCuda(cudaMalloc(&output, output_dim.tot()*sizeof(value_type)));
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checkCuda(cudaStreamCreate(&stream));
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}
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NetworkRT::~NetworkRT() {
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}
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value_type* NetworkRT::infer(dataDim_t &dim, value_type* data) {
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checkCuda(cudaMemcpyAsync(buffersRT[buf_input_idx], data, dim.tot()*sizeof(float), cudaMemcpyDeviceToDevice, stream));
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contextRT->enqueue(1, buffersRT, stream, nullptr);
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checkCuda(cudaMemcpyAsync(output, buffersRT[buf_output_idx], output_dim.tot()*sizeof(float), cudaMemcpyDeviceToDevice, stream));
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cudaStreamSynchronize(stream);
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dim = output_dim;
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return output;
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}
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ITensor* NetworkRT::convert_layer(ITensor *input, Layer *l) {
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layerType_t type = l->getLayerType();
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if(type == LAYER_DENSE)
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return convert_layer(input, (Dense*) l);
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if(type == LAYER_CONV2D)
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return convert_layer(input, (Conv2d*) l);
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if(type == LAYER_POOLING)
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return convert_layer(input, (Pooling*) l);
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if(type == LAYER_ACTIVATION)
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return convert_layer(input, (Activation*) l);
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if(type == LAYER_SOFTMAX)
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return convert_layer(input, (Softmax*) l);
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FatalError("Layer not implemented in tensorRT");
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return NULL;
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}
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ITensor* NetworkRT::convert_layer(ITensor *input, Dense *l) {
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std::cout<<"convert Dense\n";
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Weights w { dtRT, l->data_h, l->inputs*l->outputs};
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Weights b = { dtRT, l->bias_h, l->outputs};
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IFullyConnectedLayer *lRT = networkRT->addFullyConnected(*input, l->outputs, w, b);
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checkNULL(lRT);
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return lRT->getOutput(0);
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}
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ITensor* NetworkRT::convert_layer(ITensor *input, Conv2d *l) {
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std::cout<<"convert conv2D\n";
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Weights w { dtRT, l->data_h, l->inputs*l->outputs*l->kernelH*l->kernelW};
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Weights b;
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if(!l->batchnorm)
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b = { dtRT, l->bias_h, l->outputs};
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else
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b = { dtRT, nullptr, 0}; //on batchnorm bias are added later
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// Add a convolution layer with 20 outputs and a 5x5 filter.
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IConvolutionLayer *lRT = networkRT->addConvolution(*input,
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l->outputs, DimsHW{l->kernelH, l->kernelW}, w, b);
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checkNULL(lRT);
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lRT->setStride(DimsHW{l->strideH, l->strideW});
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lRT->setPadding(DimsHW{l->paddingH, l->paddingW});
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if(l->batchnorm) {
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float eps = CUDNN_BN_MIN_EPSILON;
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//make power array of ones
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value_type *power_h = new value_type[l->outputs];
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for(int i=0; i<l->outputs; i++) power_h[i] = 1.0f;
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//convert mean
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for(int i=0; i<l->outputs; i++)
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l->mean_h[i] = l->mean_h[i] / -sqrt(eps + l->variance_h[i]);
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//convert variance
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for(int i=0; i<l->outputs; i++)
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l->variance_h[i] = 1.0f / sqrt(eps + l->variance_h[i]);
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Weights power{dtRT, power_h, l->outputs};
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Weights shift{dtRT, l->mean_h, l->outputs};
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Weights scale{dtRT, l->variance_h, l->outputs};
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IScaleLayer *lRT2 = networkRT->addScale(*lRT->getOutput(0), ScaleMode::kCHANNEL,
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shift, scale, power);
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checkNULL(lRT2);
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Weights shift2{dtRT, l->bias_h, l->outputs};
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Weights scale2{dtRT, l->scales_h, l->outputs};
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IScaleLayer *lRT3 = networkRT->addScale(*lRT2->getOutput(0), ScaleMode::kCHANNEL,
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shift2, scale2, power);
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checkNULL(lRT3);
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return lRT3->getOutput(0);
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}
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return lRT->getOutput(0);
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}
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ITensor* NetworkRT::convert_layer(ITensor *input, Pooling *l) {
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std::cout<<"convert Pooling\n";
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IPoolingLayer *lRT = networkRT->addPooling(*input,
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PoolingType::kMAX, DimsHW{l->winH, l->winW});
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checkNULL(lRT);
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lRT->setStride(DimsHW{l->strideH, l->strideW});
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return lRT->getOutput(0);
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}
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ITensor* NetworkRT::convert_layer(ITensor *input, Activation *l) {
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std::cout<<"convert Activation\n";
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IActivationLayer *lRT = networkRT->addActivation(*input, ActivationType::kRELU);
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checkNULL(lRT);
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return lRT->getOutput(0);
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}
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ITensor* NetworkRT::convert_layer(ITensor *input, Softmax *l) {
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std::cout<<"convert Activation\n";
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ISoftMaxLayer *lRT = networkRT->addSoftMax(*input);
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checkNULL(lRT);
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return lRT->getOutput(0);
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}
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}
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