Move debugger connection check to main

- They were wrongly calculated on 168MHz but APB1 bus is at 42 MHz (168
  / 4)

Core/Inc/stm32f4xx_it.h

@@ -56,6 +56,7 @@ void SDIO_IRQHandler(void);
 void TIM6_DAC_IRQHandler(void);
 void DMA2_Stream3_IRQHandler(void);
 void DMA2_Stream6_IRQHandler(void);
+void DMA2_Stream7_IRQHandler(void);
 /* USER CODE BEGIN EFP */
 
 /* USER CODE END EFP */

Core/Src/canlog.c

@@ -51,11 +51,9 @@ void CAN_Logger_Init(CAN_HandleTypeDef *hcan1, CAN_HandleTypeDef *hcan2)
 
     filter.FilterBank = 0;
     if (HAL_CAN_ConfigFilter(hcan1, &filter) != HAL_OK) Error_Handler();
-    if (HAL_CAN_Start(hcan1) != HAL_OK) Error_Handler();
 
     filter.FilterBank = 14;
     if (HAL_CAN_ConfigFilter(hcan2, &filter) != HAL_OK) Error_Handler();
-    if (HAL_CAN_Start(hcan2) != HAL_OK) Error_Handler();
 }
 /* END CAN_Logger_Init */
 
@@ -77,7 +75,8 @@ void HAL_CAN_RxFifo0MsgPendingCallback(CAN_HandleTypeDef *hcan)
     // TODO: manage the case of FIFO overflow
     if (HAL_CAN_GetRxMessage(hcan, CAN_RX_FIFO0, &rxHeader, data) != HAL_OK) return;
 
-    message.id = rxHeader.ExtId;
+    if (rxHeader.IDE == CAN_ID_EXT) message.id = rxHeader.ExtId;
+    else message.id = rxHeader.StdId;
     message.dlc = rxHeader.DLC;
     message.isExtended = (rxHeader.IDE == CAN_ID_EXT);
     message.source = (hcan->Instance == CAN1) ? 1 : 2;
@@ -113,15 +112,19 @@ void vCANListener(void *argument)
   osMessageQueueId_t queue = (hcan->Instance == CAN1) ? xCAN1RxQueue : xCAN2RxQueue;
   CanMessage_t message;
 
+  if (HAL_CAN_Start(hcan) != HAL_OK) Error_Handler();
   HAL_CAN_ActivateNotification(hcan, CAN_IT_RX_FIFO0_MSG_PENDING);
 
+  uint32_t irqn = (hcan->Instance == CAN1) ? CAN1_RX0_IRQn : CAN2_RX0_IRQn;
+  HAL_NVIC_SetPriority(irqn, 6, 0);
+  HAL_NVIC_EnableIRQ(irqn);
+
   for (;;)
   {
     if (osMessageQueueGet(queue, &message, NULL, osWaitForever) == osOK)
     {
           // J1939 decoding
 
-          // RELAY: Push to the UART queue
       osMessageQueuePut(xUARTQueue, &message, 0U, 0U);
     }
   }

Core/Src/cansend.c

@@ -101,20 +101,27 @@ void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
   */
 void vUARTLogger(void *argument)
 {
-    CanMessage_t message;
-    char tx_buffer[45];
+  CanMessage_t message;
+  char tx_buffer[45];
 
-    for (;;)
+  for (;;)
+  {
+    DEBUG_PRINT("Waiting for CAN traffic...\r\n");
+    if (osMessageQueueGet(xUARTQueue, &message, NULL, osWaitForever) == osOK)
     {
-      DEBUG_PRINT("Waiting for CAN traffic...\r\n");
-      if (osMessageQueueGet(xUARTQueue, &message, NULL, osWaitForever) == osOK)
+      osSemaphoreAcquire(xUARTDMASemaphore, osWaitForever);
+      int len = format_can_message(tx_buffer, message.source, &message);
+
+      if (HAL_UART_Transmit_DMA(&huart1, (uint8_t*)tx_buffer, len) == HAL_OK)
       {
-        DEBUG_PRINT("CAN frame detected\r\n");
-        format_can_message(tx_buffer, message.source, &message);
-        HAL_UART_Transmit_DMA(&huart1, (uint8_t*)tx_buffer, len);
-        osSemaphoreAcquire(xUARTDMASemaphore, osWaitForever);
-        DEBUG_PRINT("CAN frame sent via UART\r\n");
+          DEBUG_PRINT("CAN frame sent via UART\r\n");
+      }
+      else
+      {
+        osSemaphoreRelease(xUARTDMASemaphore);
+        DEBUG_PRINT("HAL error, CAN frame NOT sent!\r\n");
       }
     }
+  }
 }
 /* END vUARTLoggerListen */

Core/Src/main.c

@@ -46,6 +46,7 @@ DMA_HandleTypeDef hdma_sdio_rx;
 DMA_HandleTypeDef hdma_sdio_tx;
 
 UART_HandleTypeDef huart1;
+DMA_HandleTypeDef hdma_usart1_tx;
 
 /* USER CODE BEGIN PV */
 LED_Config led_can1 = {GPIOB, GPIO_PIN_5};
@@ -76,11 +77,8 @@ static void MX_SDIO_SD_Init(void);
 static void MX_USART1_UART_Init(void);
 
 /* USER CODE BEGIN PFP */
-int _write(int file, char *ptr, int len) {
- for (int i = 0; i < len; i++) {
- ITM_SendChar((*ptr++));
- }
- return len;
+int _write(int file, char *ptr, int len) for (int i = 0; i < len; i++) ITM_SendChar((*ptr++));
+  return len;
 }
 /* USER CODE END PFP */
 
@@ -97,10 +95,14 @@ int main(void)
 {
 
   /* USER CODE BEGIN 1 */
-  CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
-  ITM->LAR = 0xC5ACCE55;
-  ITM->TER = 1 << 0;
-  ITM->TCR = ITM_TCR_ITMENA_Msk | ITM_TCR_SYNCENA_Msk | ITM_TCR_SWOENA_Msk;
+  if (CoreDebug->DHCSR & CoreDebug_DHCSR_C_DEBUGEN_Msk)
+  {
+    CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
+    ITM->LAR = 0xC5ACCE55;
+    ITM->TER = 1 << 0;
+    ITM->TCR = ITM_TCR_ITMENA_Msk | ITM_TCR_SYNCENA_Msk | ITM_TCR_SWOENA_Msk;
+  }
+
   DEBUG_PRINT("Booting system\r\n");
   /* USER CODE END 1 */
 
@@ -170,7 +172,7 @@ int main(void)
   /* USER CODE END RTOS_MUTEX */
 
   /* USER CODE BEGIN RTOS_SEMAPHORES */
-  xUARTDMASemaphore = osSemaphoreNew(1, 0, NULL);
+  xUARTDMASemaphore = osSemaphoreNew(1, 1, NULL);
   if (xUARTDMASemaphore == NULL) Error_Handler();
   /* USER CODE END RTOS_SEMAPHORES */
 
@@ -276,7 +278,7 @@ static void MX_CAN1_Init(void)
 
   /* USER CODE END CAN1_Init 1 */
   hcan1.Instance = CAN1;
-  hcan1.Init.Prescaler = 4;
+  hcan1.Init.Prescaler = 8;
   hcan1.Init.Mode = CAN_MODE_SILENT;
   hcan1.Init.SyncJumpWidth = CAN_SJW_1TQ;
   hcan1.Init.TimeSeg1 = CAN_BS1_16TQ;
@@ -313,7 +315,7 @@ static void MX_CAN2_Init(void)
 
   /* USER CODE END CAN2_Init 1 */
   hcan2.Instance = CAN2;
-  hcan2.Init.Prescaler = 8;
+  hcan2.Init.Prescaler = 16;
   hcan2.Init.Mode = CAN_MODE_SILENT;
   hcan2.Init.SyncJumpWidth = CAN_SJW_1TQ;
   hcan2.Init.TimeSeg1 = CAN_BS1_16TQ;
@@ -386,7 +388,7 @@ static void MX_USART1_UART_Init(void)
 
   /* USER CODE END USART1_Init 1 */
   huart1.Instance = USART1;
-  huart1.Init.BaudRate = 1152000;
+  huart1.Init.BaudRate = 115200;
   huart1.Init.WordLength = UART_WORDLENGTH_8B;
   huart1.Init.StopBits = UART_STOPBITS_1;
   huart1.Init.Parity = UART_PARITY_NONE;
@@ -419,6 +421,9 @@ static void MX_DMA_Init(void)
   /* DMA2_Stream6_IRQn interrupt configuration */
   HAL_NVIC_SetPriority(DMA2_Stream6_IRQn, 5, 0);
   HAL_NVIC_EnableIRQ(DMA2_Stream6_IRQn);
+  /* DMA2_Stream7_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 5, 0);
+  HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn);
 
   /* USER CODE BEGIN MX_DMA_Init 1 */
   DEBUG_PRINT("DMA initialized!\r\n");

Core/Src/stm32f4xx_hal_msp.c

@@ -26,6 +26,8 @@ extern DMA_HandleTypeDef hdma_sdio_rx;
 
 extern DMA_HandleTypeDef hdma_sdio_tx;
 
+extern DMA_HandleTypeDef hdma_usart1_tx;
+
 /* Private typedef -----------------------------------------------------------*/
 /* USER CODE BEGIN TD */
 
@@ -371,6 +373,25 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart)
     GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
     HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 
+    /* USART1 DMA Init */
+    /* USART1_TX Init */
+    hdma_usart1_tx.Instance = DMA2_Stream7;
+    hdma_usart1_tx.Init.Channel = DMA_CHANNEL_4;
+    hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
+    hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
+    hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE;
+    hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
+    hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
+    hdma_usart1_tx.Init.Mode = DMA_NORMAL;
+    hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW;
+    hdma_usart1_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
+    if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    __HAL_LINKDMA(huart,hdmatx,hdma_usart1_tx);
+
     /* USER CODE BEGIN USART1_MspInit 1 */
 
     /* USER CODE END USART1_MspInit 1 */
@@ -401,6 +422,8 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
     */
     HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10);
 
+    /* USART1 DMA DeInit */
+    HAL_DMA_DeInit(huart->hdmatx);
     /* USER CODE BEGIN USART1_MspDeInit 1 */
 
     /* USER CODE END USART1_MspDeInit 1 */

Core/Src/stm32f4xx_it.c

@@ -58,6 +58,7 @@
 extern DMA_HandleTypeDef hdma_sdio_rx;
 extern DMA_HandleTypeDef hdma_sdio_tx;
 extern SD_HandleTypeDef hsd;
+extern DMA_HandleTypeDef hdma_usart1_tx;
 extern TIM_HandleTypeDef htim6;
 
 /* USER CODE BEGIN EV */
@@ -218,6 +219,20 @@ void DMA2_Stream6_IRQHandler(void)
   /* USER CODE END DMA2_Stream6_IRQn 1 */
 }
 
+/**
+  * @brief This function handles DMA2 stream7 global interrupt.
+  */
+void DMA2_Stream7_IRQHandler(void)
+{
+  /* USER CODE BEGIN DMA2_Stream7_IRQn 0 */
+
+  /* USER CODE END DMA2_Stream7_IRQn 0 */
+  HAL_DMA_IRQHandler(&hdma_usart1_tx);
+  /* USER CODE BEGIN DMA2_Stream7_IRQn 1 */
+
+  /* USER CODE END DMA2_Stream7_IRQn 1 */
+}
+
 /* USER CODE BEGIN 1 */
 
 /* USER CODE END 1 */

can_logger.ioc

@@ -20,7 +20,8 @@ CAN2.Mode=CAN_MODE_SILENT
 CAN2.Prescaler=8
 Dma.Request0=SDIO_RX
 Dma.Request1=SDIO_TX
-Dma.RequestsNb=2
+Dma.Request2=USART1_TX
+Dma.RequestsNb=3
 Dma.SDIO_RX.0.Direction=DMA_PERIPH_TO_MEMORY
 Dma.SDIO_RX.0.FIFOMode=DMA_FIFOMODE_ENABLE
 Dma.SDIO_RX.0.FIFOThreshold=DMA_FIFO_THRESHOLD_FULL
@@ -47,6 +48,16 @@ Dma.SDIO_TX.1.PeriphDataAlignment=DMA_PDATAALIGN_WORD
 Dma.SDIO_TX.1.PeriphInc=DMA_PINC_DISABLE
 Dma.SDIO_TX.1.Priority=DMA_PRIORITY_LOW
 Dma.SDIO_TX.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,FIFOThreshold,MemBurst,PeriphBurst
+Dma.USART1_TX.2.Direction=DMA_MEMORY_TO_PERIPH
+Dma.USART1_TX.2.FIFOMode=DMA_FIFOMODE_DISABLE
+Dma.USART1_TX.2.Instance=DMA2_Stream7
+Dma.USART1_TX.2.MemDataAlignment=DMA_MDATAALIGN_BYTE
+Dma.USART1_TX.2.MemInc=DMA_MINC_ENABLE
+Dma.USART1_TX.2.Mode=DMA_NORMAL
+Dma.USART1_TX.2.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
+Dma.USART1_TX.2.PeriphInc=DMA_PINC_DISABLE
+Dma.USART1_TX.2.Priority=DMA_PRIORITY_LOW
+Dma.USART1_TX.2.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
 FREERTOS.FootprintOK=true
 FREERTOS.IPParameters=Tasks01,configUSE_NEWLIB_REENTRANT,FootprintOK
 FREERTOS.Tasks01=DefaultTask,49,128,can_listen,Default,NULL,Dynamic,NULL,NULL
@@ -96,6 +107,7 @@ MxDb.Version=DB.6.0.170
 NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
 NVIC.DMA2_Stream3_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
 NVIC.DMA2_Stream6_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
+NVIC.DMA2_Stream7_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
 NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
 NVIC.ForceEnableDMAVector=true
 NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false