Erick
13 lines
210 B
Verilog
13 lines
210 B
Verilog
module nand3way(y16, a16, b16, c16);
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input a16;
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input b16;
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input c16;
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output y16;
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wire tmp0, tmp1
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nand(tmp0, a16, b16);
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nand(tmp1, tmp0, tmp0);
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nand(y16, tmp1, c16);
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endmodule |