This repository has been archived on 2026-02-06 . You can view files and clone it. You cannot open issues or pull requests or push a commit.
4cbdd294fb5d27eaf1be5712eb0f52a2bc94cd4a
nand2tetris-project
Hack computer, built following nand2tetris course using Verilog
The gates are designed following a behavioural modelling philosophy (mostly for learning purposes, even though a data flow modelling system would be preferible for big projects)
Description
Languages
SystemVerilog
45.9%
Verilog
41.3%
C
8.3%
Assembly
3.2%
V
1.3%