Update comments and whitespace

src/clockinator.S

@@ -46,7 +46,7 @@ main:
 
     ;ldi         r26,        60          ; Default BPM //TODO: save to eeprom not register, on runtime also ldi on r24 register
 
-    ; Setup general registers
+    ; Setup general registers and global variables
     ; 0
     clr     r0
     sts     timer0_overflow_count,  r0

src/timer.inc

@@ -17,14 +17,14 @@ timer0_set:
 
 timer0_start:
     ldi     r16,        (1<<CS02) | (1<<CS00)
-    out     TCCR0B,     r16                         ; Load prescaler = 1024
+    out     TCCR0B,     r16                         ; Load prescaler (00000101 = 1024)
 
     ret
 
 timer0_isr:
     lds     r16,    timer0_overflow_count
-    cpi     r16,    160                             ; Max count for min BPM<=24 (slightly lower)
+    cpi     r16,    160                             ; BPM update timeframe expiration limit (160 -> ~20 BPM)
-    brge    .timer0_stop
+    brge    .timer0_stop                            ;//TODO: check if breq would be more efficient than brge
 
     add     r16,    r1
     sts     timer0_overflow_count,  r16             ; Update new overflow counter
@@ -33,6 +33,7 @@ timer0_isr:
 
 .timer0_stop:
     sts     timer0_overflow_count,  r0              ; Reset overflow byte
+
     out     TCCR0B,     r0                          ; Stop timer0 by clearing prescaler
 
     ldi     r16,        (1 << TOV0)
@@ -40,7 +41,6 @@ timer0_isr:
 
     reti
 
-
 timer1_set:
     ldi     r19,        127                         ; Timer base period (time granularity)
     out     OCR1A,      r19                         ; Set timer count compare
@@ -56,7 +56,6 @@ timer1_set:
 
     ret
 
-; ISR
 timer1_isr:
     in      r21,        SREG
     push    r21