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variable name change

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This commit is contained in:
Erick
2022-02-13 22:59:43 +01:00
parent 32b7cb2667
commit ad13f51765
2 changed files with 65 additions and 63 deletions
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src/registers.c
+34 -32
View File
@@ -1,22 +1,24 @@
#include "preprocessor.c"
/* initialization of registers and memory /* initialization of registers and memory
/* memory mapped register tables */ /* memory mapped register tables */
enum mmr { enum mmr {
MMR_KSR = 0xFE00, // keyboard status MR_KSR = 0xFE00, // keyboard status
MMR_KDR = 0xFE02 // keyboard data MR_KDR = 0xFE02 // keyboard data
}; };
/* Initializing 10 registers of which: /* Initializing 10 registers of which:
8 general purpose, 1 program counter, 1 conditional */ 8 general purpose, 1 program counter, 1 conditional */
enum registers { enum registers {
R0 = 0, RG_R0 = 0,
R1, RG_R1,
R2, RG_R2,
R3, RG_R3,
R4, RG_R4,
R5, RG_R5,
R6, RG_R6,
R7, RG_R7,
RG_PC, // program counter RG_PC, // program counter
RG_COND, // condition flag RG_COND, // condition flag
RG_COUNT RG_COUNT
@@ -24,32 +26,32 @@ enum registers {
/* Creating instruction set opcodes */ /* Creating instruction set opcodes */
enum opcodes { // [name, 8-bit value] enum opcodes { // [name, 8-bit value]
BR = 0, // branch, 0000 OP_BR = 0, // branch, 0000
ADD, // add, 0001 OP_ADD, // add, 0001
LD, // load, 0010 OP_LD, // load, 0010
ST, // store, 0011 OP_ST, // store, 0011
JSR, // jump register, 0100 OP_JSR, // jump register, 0100
AND, // bitwise and, 0101 OP_AND, // bitwise and, 0101
LDR, // load register, 0110 OP_LDR, // load register, 0110
STR, // store register, 0111 OP_STR, // store register, 0111
RTI, // unused opcode OP_RTI, // unused opcode
NOT, // bitwise not, 1001 OP_NOT, // bitwise not, 1001
LDI, // indirect load, 1010 OP_LDI, // indirect load, 1010
STI, // indirect store, 1011 OP_STI, // indirect store, 1011
JMP, // jump, 1100 OP_JMP, // jump, 1100
RES, // reserved opcode, OP_RES, // reserved opcode,
LEA, // load effective address, 1110 OP_LEA, // load effective address, 1110
TRAP, // execute trap, 1111 OP_TRAP, // execute trap, 1111
}; };
/* Trap codes used for OP_TRAP */ /* Trap codes used for OP_TRAP */
enum trapcodes { enum trapcodes {
GETC = 0x20, // get charcter from keyboard TC_GETC = 0x20, // get charcter from keyboard
OUTP = 0x21, // output a character TC_OUT = 0x21, // output a character
PUTS = 0x22, // output a word string TC_PUTS = 0x22, // output a word string
INP = 0x23, // get charcter from keyboard and echo to terminal TC_IN = 0x23, // get charcter from keyboard and echo to terminal
PUTSP = 0x24, // output a byte string TC_PUTSP = 0x24, // output a byte string
HALT = 0x25 // halt program TC_HALT = 0x25 // halt program
}; };
/* Creating condition flags */ /* Creating condition flags */
src/tyvm.c
+31 -31
View File
@@ -4,7 +4,7 @@
Open-source software distributed under GNU GPL v.3 license Open-source software distributed under GNU GPL v.3 license
*/ */
#include "preprocessor.h" #include "preprocessor.c"
#include "registers.c" #include "registers.c"
#include "lc3_lib.h" #include "lc3_lib.h"
@@ -29,8 +29,8 @@ int main(int argc, const char* argv[]) {
int running = TRUE; int running = TRUE;
while(running) { while(running) {
static uint16_t instr = mem_read(reg[RG_PC]++); const uint16_t instr = mem_read(reg[RG_PC]++);
static uint16_t op = instr >> 12; const uint16_t op = instr >> 12;
static uint16_t cond; // condition flag status static uint16_t cond; // condition flag status
static uint16_t PCoffset9; // 9-bit value that indicates where to load the address when added to PC register static uint16_t PCoffset9; // 9-bit value that indicates where to load the address when added to PC register
@@ -52,14 +52,14 @@ int main(int argc, const char* argv[]) {
static uint16_t* ch; static uint16_t* ch;
switch (op) { switch (op) {
case BR: case OP_BR:
cond = (instr >> 9) & 0x7; cond = (instr >> 9) & 0x7;
PCoffset9 = sign_extend(instr & 0x1FF, 9); PCoffset9 = sign_extend(instr & 0x1FF, 9);
if(cond & reg[RG_COND]) reg[RG_PC] += PCoffset9; if(cond & reg[RG_COND]) reg[RG_PC] += PCoffset9;
break; break;
case ADD: case OP_ADD:
dr = (instr >> 9) & 0x7; dr = (instr >> 9) & 0x7;
sr1 = (instr >> 6) & 0x7; sr1 = (instr >> 6) & 0x7;
imm_flag = (instr >> 5) & 0x1; imm_flag = (instr >> 5) & 0x1;
@@ -75,7 +75,7 @@ int main(int argc, const char* argv[]) {
update_flags(dr); update_flags(dr);
break; break;
case LD: case OP_LD:
dr = (instr >> 9) & 0x7; dr = (instr >> 9) & 0x7;
PCoffset9 = sign_extend(instr & 0x1FF, 9); PCoffset9 = sign_extend(instr & 0x1FF, 9);
@@ -84,7 +84,7 @@ int main(int argc, const char* argv[]) {
update_flags(dr); update_flags(dr);
break; break;
case ST: case OP_ST:
sr = (instr >> 6) & 0x7; sr = (instr >> 6) & 0x7;
PCoffset9 = sign_extend(instr & 0x1FF, 9); // 9-bit value that indicates where to load the address when added to RG_PC PCoffset9 = sign_extend(instr & 0x1FF, 9); // 9-bit value that indicates where to load the address when added to RG_PC
@@ -93,7 +93,7 @@ int main(int argc, const char* argv[]) {
update_flags(dr); update_flags(dr);
break; break;
case JSR: case OP_JSR:
PCoffset11 = sign_extend(instr & 0x1FF, 11); PCoffset11 = sign_extend(instr & 0x1FF, 11);
jsr_flag = (instr >> 11) & 0x1; jsr_flag = (instr >> 11) & 0x1;
BaseR_jsrr = (instr >> 6) & 0x7; // JSRR only ecoding BaseR_jsrr = (instr >> 6) & 0x7; // JSRR only ecoding
@@ -102,7 +102,7 @@ int main(int argc, const char* argv[]) {
else reg[RG_PC] += PCoffset11; // JSR else reg[RG_PC] += PCoffset11; // JSR
break; break;
case AND: case OP_AND:
dr = (instr >> 9) & 0x7; dr = (instr >> 9) & 0x7;
sr1 = (instr >> 6) & 0x7; sr1 = (instr >> 6) & 0x7;
imm_flag = (instr >> 5) & 0x1; imm_flag = (instr >> 5) & 0x1;
@@ -118,7 +118,7 @@ int main(int argc, const char* argv[]) {
update_flags(dr); update_flags(dr);
break; break;
case LDR: case OP_LDR:
dr = (instr >> 9) & 0x7; dr = (instr >> 9) & 0x7;
BaseR = (instr >> 6) & 0x7; BaseR = (instr >> 6) & 0x7;
offset6 = sign_extend(instr & 0x3FF, 6); offset6 = sign_extend(instr & 0x3FF, 6);
@@ -128,7 +128,7 @@ int main(int argc, const char* argv[]) {
update_flags(dr); update_flags(dr);
break; break;
case STR: case OP_STR:
sr = (instr >> 6) & 0x7; sr = (instr >> 6) & 0x7;
BaseR = (instr >> 6) & 0x7; BaseR = (instr >> 6) & 0x7;
offset6 = sign_extend(instr & 0x1FF, 6); offset6 = sign_extend(instr & 0x1FF, 6);
@@ -138,7 +138,7 @@ int main(int argc, const char* argv[]) {
update_flags(dr); update_flags(dr);
break; break;
case NOT: case OP_NOT:
dr = (instr >> 9) & 0x7; // destination register dr = (instr >> 9) & 0x7; // destination register
sr = (instr >> 6) & 0x7; // source register sr = (instr >> 6) & 0x7; // source register
@@ -147,7 +147,7 @@ int main(int argc, const char* argv[]) {
update_flags(dr); update_flags(dr);
break; break;
case LDI: case OP_LDI:
dr = (instr >> 9) & 0x7; dr = (instr >> 9) & 0x7;
PCoffset9 = sign_extend(instr & 0x1FF, 9); PCoffset9 = sign_extend(instr & 0x1FF, 9);
@@ -156,7 +156,7 @@ int main(int argc, const char* argv[]) {
update_flags(dr); update_flags(dr);
break; break;
case STI: case OP_STI:
sr = (instr >> 6) & 0x7; sr = (instr >> 6) & 0x7;
PCoffset9 = sign_extend(instr & 0x1FF, 9); // 9-bit value that indicates where to load the address when added to RG_PC PCoffset9 = sign_extend(instr & 0x1FF, 9); // 9-bit value that indicates where to load the address when added to RG_PC
@@ -165,7 +165,7 @@ int main(int argc, const char* argv[]) {
update_flags(dr); update_flags(dr);
break; break;
case JMP: case OP_JMP:
BaseR = (instr >> 6) & 0x7; BaseR = (instr >> 6) & 0x7;
reg[RG_PC] = reg[BaseR]; reg[RG_PC] = reg[BaseR];
@@ -173,7 +173,7 @@ int main(int argc, const char* argv[]) {
update_flags(dr); update_flags(dr);
break; break;
case LEA: case OP_LEA:
dr = (instr >> 9) & 0x7; dr = (instr >> 9) & 0x7;
PCoffset9 = sign_extend(instr & 0x1FF, 9); PCoffset9 = sign_extend(instr & 0x1FF, 9);
@@ -182,17 +182,17 @@ int main(int argc, const char* argv[]) {
update_flags(dr); update_flags(dr);
break; break;
case TRAP: case OP_TRAP:
switch(instr & 0xFF) { switch(instr & 0xFF) {
case GETC: case TC_GETC:
reg[R0] = (uint16_t)getchar(); reg[RG_R0] = (uint16_t)getchar();
break; break;
case OUTP: case TC_OUT:
putc((char)reg[R0], stdout); putc((char)reg[RG_R0], stdout);
fflush(stdout); fflush(stdout);
break; break;
case PUTS: case TC_PUTS:
stringPnt = memory + reg[R0]; stringPnt = memory + reg[RG_R0];
while (*c) { while (*c) {
putc((char)*c, stdout); putc((char)*c, stdout);
@@ -201,18 +201,18 @@ int main(int argc, const char* argv[]) {
fflush(stdout); fflush(stdout);
break; break;
case INP: case TC_IN:
printf("Enter a character: "); printf("Enter a character: ");
char c = getchar(); char c = getchar();
putc(c, stdout); putc(c, stdout);
fflush(stdout); fflush(stdout);
reg[R0] = (uint16_t)c; reg[RG_R0] = (uint16_t)c;
update_flags(R0); update_flags(RG_R0);
break; break;
case PUTSP: case TC_PUTSP:
ch = memory + reg[R0]; ch = memory + reg[RG_R0];
while (*ch) { while (*ch) {
char char1 = (*ch) & 0xFF; char char1 = (*ch) & 0xFF;
putc(char1, stdout); putc(char1, stdout);
@@ -223,7 +223,7 @@ int main(int argc, const char* argv[]) {
fflush(stdout); fflush(stdout);
break; break;
case HALT: case TC_HALT:
puts("HALT"); puts("HALT");
fflush(stdout); fflush(stdout);
running = FALSE; running = FALSE;
@@ -234,8 +234,8 @@ int main(int argc, const char* argv[]) {
break; break;
} }
break; break;
case RES: // reserved case OP_RES: // reserved
case RTI: // unused case OP_RTI: // unused
default: default:
abort(); abort();
break; break;