feat:replace boost library with C++11 std library
This commit is contained in:
Livox-SDK
@@ -0,0 +1,75 @@
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/* Licensed to the Apache Software Foundation (ASF) under one or more
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||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership.
|
||||
* The ASF licenses this file to You under the Apache License, Version 2.0
|
||||
* (the "License"); you may not use this file except in compliance with
|
||||
* the License. You may obtain a copy of the License at
|
||||
*
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||||
* http://www.apache.org/licenses/LICENSE-2.0
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||||
*
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||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
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||||
*/
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#include "apr.h"
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#include "apr_atomic.h"
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#include <stdlib.h>
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APR_DECLARE(apr_status_t) apr_atomic_init(apr_pool_t *pool)
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{
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return APR_SUCCESS;
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}
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APR_DECLARE(apr_uint32_t) apr_atomic_add32(volatile apr_uint32_t *mem, apr_uint32_t val)
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{
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return atomic_xchgadd((unsigned long *)mem,(unsigned long)val);
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}
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APR_DECLARE(void) apr_atomic_sub32(volatile apr_uint32_t *mem, apr_uint32_t val)
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{
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atomic_sub((unsigned long *)mem,(unsigned long)val);
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}
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APR_DECLARE(apr_uint32_t) apr_atomic_inc32(volatile apr_uint32_t *mem)
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{
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return atomic_xchgadd((unsigned long *)mem, 1);
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}
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APR_DECLARE(void) apr_atomic_set32(volatile apr_uint32_t *mem, apr_uint32_t val)
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{
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*mem = val;
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}
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APR_DECLARE(apr_uint32_t) apr_atomic_read32(volatile apr_uint32_t *mem)
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{
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return *mem;
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}
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APR_DECLARE(apr_uint32_t) apr_atomic_cas32(volatile apr_uint32_t *mem, apr_uint32_t with,apr_uint32_t cmp)
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{
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return atomic_cmpxchg((unsigned long *)mem,(unsigned long)cmp,(unsigned long)with);
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}
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APR_DECLARE(apr_uint32_t) apr_atomic_xchg32(volatile apr_uint32_t *mem, apr_uint32_t val)
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{
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return atomic_xchg((unsigned long *)mem,(unsigned long)val);
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}
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APR_DECLARE(int) apr_atomic_dec32(volatile apr_uint32_t *mem)
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{
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return (atomic_xchgadd((unsigned long *)mem, 0xFFFFFFFF) - 1);
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}
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APR_DECLARE(void *) apr_atomic_casptr(volatile void **mem, void *with, const void *cmp)
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{
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return (void*)atomic_cmpxchg((unsigned long *)mem,(unsigned long)cmp,(unsigned long)with);
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}
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APR_DECLARE(void*) apr_atomic_xchgptr(volatile void **mem, void *with)
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{
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return (void*)atomic_xchg((unsigned long *)mem,(unsigned long)with);
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}
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+137
@@ -0,0 +1,137 @@
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/* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership.
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* The ASF licenses this file to You under the Apache License, Version 2.0
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* (the "License"); you may not use this file except in compliance with
|
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* the License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "apr.h"
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#include "apr_atomic.h"
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#include <stdlib.h>
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apr_status_t apr_atomic_init(apr_pool_t *p)
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{
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return APR_SUCCESS;
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}
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apr_uint32_t apr_atomic_add32(volatile apr_uint32_t *mem, apr_uint32_t val)
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{
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apr_uint32_t old, new_val;
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old = *mem; /* old is automatically updated on cs failure */
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do {
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new_val = old + val;
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} while (__cs(&old, (cs_t *)mem, new_val));
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return old;
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}
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void apr_atomic_sub32(volatile apr_uint32_t *mem, apr_uint32_t val)
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{
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apr_uint32_t old, new_val;
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old = *mem; /* old is automatically updated on cs failure */
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do {
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new_val = old - val;
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} while (__cs(&old, (cs_t *)mem, new_val));
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}
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apr_uint32_t apr_atomic_inc32(volatile apr_uint32_t *mem)
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{
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return apr_atomic_add32(mem, 1);
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}
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int apr_atomic_dec32(volatile apr_uint32_t *mem)
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{
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apr_uint32_t old, new_val;
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old = *mem; /* old is automatically updated on cs failure */
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do {
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new_val = old - 1;
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} while (__cs(&old, (cs_t *)mem, new_val));
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return new_val != 0;
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}
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apr_uint32_t apr_atomic_read32(volatile apr_uint32_t *mem)
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{
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return *mem;
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}
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void apr_atomic_set32(volatile apr_uint32_t *mem, apr_uint32_t val)
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{
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*mem = val;
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}
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apr_uint32_t apr_atomic_cas32(volatile apr_uint32_t *mem, apr_uint32_t swap,
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apr_uint32_t cmp)
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{
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apr_uint32_t old = cmp;
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__cs(&old, (cs_t *)mem, swap);
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return old; /* old is automatically updated from mem on cs failure */
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}
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#if APR_SIZEOF_VOIDP == 4
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void *apr_atomic_casptr(volatile void **mem_ptr,
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void *swap_ptr,
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const void *cmp_ptr)
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{
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__cs1(&cmp_ptr, /* automatically updated from mem on __cs1 failure */
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mem_ptr, /* set from swap when __cs1 succeeds */
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&swap_ptr);
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return (void *)cmp_ptr;
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}
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#elif APR_SIZEOF_VOIDP == 8
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void *apr_atomic_casptr(volatile void **mem_ptr,
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void *swap_ptr,
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const void *cmp_ptr)
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{
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__csg(&cmp_ptr, /* automatically updated from mem on __csg failure */
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mem_ptr, /* set from swap when __csg succeeds */
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&swap_ptr);
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return (void *)cmp_ptr;
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}
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#else
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#error APR_SIZEOF_VOIDP value not supported
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#endif /* APR_SIZEOF_VOIDP */
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apr_uint32_t apr_atomic_xchg32(volatile apr_uint32_t *mem, apr_uint32_t val)
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{
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apr_uint32_t old, new_val;
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old = *mem; /* old is automatically updated on cs failure */
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do {
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new_val = val;
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} while (__cs(&old, (cs_t *)mem, new_val));
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return old;
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}
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APR_DECLARE(void*) apr_atomic_xchgptr(volatile void **mem_ptr, void *new_ptr)
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{
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void *old_ptr;
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old_ptr = *(void **)mem_ptr; /* old is automatically updated on cs failure */
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#if APR_SIZEOF_VOIDP == 4
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do {
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} while (__cs1(&old_ptr, mem_ptr, &new_ptr));
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#elif APR_SIZEOF_VOIDP == 8
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do {
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} while (__csg(&old_ptr, mem_ptr, &new_ptr));
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#else
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#error APR_SIZEOF_VOIDP value not supported
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#endif /* APR_SIZEOF_VOIDP */
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return old_ptr;
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}
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@@ -0,0 +1,81 @@
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/* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership.
|
||||
* The ASF licenses this file to You under the Apache License, Version 2.0
|
||||
* (the "License"); you may not use this file except in compliance with
|
||||
* the License. You may obtain a copy of the License at
|
||||
*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
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* limitations under the License.
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*/
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#include "apr_arch_atomic.h"
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#ifdef USE_ATOMICS_BUILTINS
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APR_DECLARE(apr_status_t) apr_atomic_init(apr_pool_t *p)
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{
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return APR_SUCCESS;
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}
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APR_DECLARE(apr_uint32_t) apr_atomic_read32(volatile apr_uint32_t *mem)
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{
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return *mem;
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}
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APR_DECLARE(void) apr_atomic_set32(volatile apr_uint32_t *mem, apr_uint32_t val)
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{
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*mem = val;
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}
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APR_DECLARE(apr_uint32_t) apr_atomic_add32(volatile apr_uint32_t *mem, apr_uint32_t val)
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{
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return __sync_fetch_and_add(mem, val);
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}
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APR_DECLARE(void) apr_atomic_sub32(volatile apr_uint32_t *mem, apr_uint32_t val)
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{
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__sync_fetch_and_sub(mem, val);
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}
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APR_DECLARE(apr_uint32_t) apr_atomic_inc32(volatile apr_uint32_t *mem)
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{
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return __sync_fetch_and_add(mem, 1);
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}
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APR_DECLARE(int) apr_atomic_dec32(volatile apr_uint32_t *mem)
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{
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return __sync_sub_and_fetch(mem, 1);
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}
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APR_DECLARE(apr_uint32_t) apr_atomic_cas32(volatile apr_uint32_t *mem, apr_uint32_t with,
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apr_uint32_t cmp)
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{
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return __sync_val_compare_and_swap(mem, cmp, with);
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}
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APR_DECLARE(apr_uint32_t) apr_atomic_xchg32(volatile apr_uint32_t *mem, apr_uint32_t val)
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{
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__sync_synchronize();
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return __sync_lock_test_and_set(mem, val);
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}
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APR_DECLARE(void*) apr_atomic_casptr(volatile void **mem, void *with, const void *cmp)
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{
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return (void*) __sync_val_compare_and_swap(mem, cmp, with);
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}
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APR_DECLARE(void*) apr_atomic_xchgptr(volatile void **mem, void *with)
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{
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__sync_synchronize();
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return (void*) __sync_lock_test_and_set(mem, with);
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}
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#endif /* USE_ATOMICS_BUILTINS */
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+127
@@ -0,0 +1,127 @@
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/* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership.
|
||||
* The ASF licenses this file to You under the Apache License, Version 2.0
|
||||
* (the "License"); you may not use this file except in compliance with
|
||||
* the License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "apr_arch_atomic.h"
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|
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#ifdef USE_ATOMICS_IA32
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APR_DECLARE(apr_status_t) apr_atomic_init(apr_pool_t *p)
|
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{
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return APR_SUCCESS;
|
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}
|
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|
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APR_DECLARE(apr_uint32_t) apr_atomic_read32(volatile apr_uint32_t *mem)
|
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{
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return *mem;
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}
|
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APR_DECLARE(void) apr_atomic_set32(volatile apr_uint32_t *mem, apr_uint32_t val)
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{
|
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*mem = val;
|
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}
|
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APR_DECLARE(apr_uint32_t) apr_atomic_add32(volatile apr_uint32_t *mem, apr_uint32_t val)
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{
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asm volatile ("lock; xaddl %0,%1"
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: "=r" (val), "=m" (*mem)
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: "0" (val), "m" (*mem)
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: "memory", "cc");
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return val;
|
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}
|
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APR_DECLARE(void) apr_atomic_sub32(volatile apr_uint32_t *mem, apr_uint32_t val)
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{
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asm volatile ("lock; subl %1, %0"
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: /* no output */
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: "m" (*(mem)), "r" (val)
|
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: "memory", "cc");
|
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}
|
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|
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APR_DECLARE(apr_uint32_t) apr_atomic_inc32(volatile apr_uint32_t *mem)
|
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{
|
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return apr_atomic_add32(mem, 1);
|
||||
}
|
||||
|
||||
APR_DECLARE(int) apr_atomic_dec32(volatile apr_uint32_t *mem)
|
||||
{
|
||||
unsigned char prev;
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|
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asm volatile ("lock; decl %0; setnz %1"
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: "=m" (*mem), "=qm" (prev)
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: "m" (*mem)
|
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: "memory");
|
||||
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return prev;
|
||||
}
|
||||
|
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APR_DECLARE(apr_uint32_t) apr_atomic_cas32(volatile apr_uint32_t *mem, apr_uint32_t with,
|
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apr_uint32_t cmp)
|
||||
{
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||||
apr_uint32_t prev;
|
||||
|
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asm volatile ("lock; cmpxchgl %1, %2"
|
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: "=a" (prev)
|
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: "r" (with), "m" (*(mem)), "0"(cmp)
|
||||
: "memory", "cc");
|
||||
return prev;
|
||||
}
|
||||
|
||||
APR_DECLARE(apr_uint32_t) apr_atomic_xchg32(volatile apr_uint32_t *mem, apr_uint32_t val)
|
||||
{
|
||||
apr_uint32_t prev = val;
|
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|
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asm volatile ("xchgl %0, %1"
|
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: "=r" (prev), "+m" (*mem)
|
||||
: "0" (prev));
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return prev;
|
||||
}
|
||||
|
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APR_DECLARE(void*) apr_atomic_casptr(volatile void **mem, void *with, const void *cmp)
|
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{
|
||||
void *prev;
|
||||
#if APR_SIZEOF_VOIDP == 4
|
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asm volatile ("lock; cmpxchgl %2, %1"
|
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: "=a" (prev), "=m" (*mem)
|
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: "r" (with), "m" (*mem), "0" (cmp));
|
||||
#elif APR_SIZEOF_VOIDP == 8
|
||||
asm volatile ("lock; cmpxchgq %q2, %1"
|
||||
: "=a" (prev), "=m" (*mem)
|
||||
: "r" ((unsigned long)with), "m" (*mem),
|
||||
"0" ((unsigned long)cmp));
|
||||
#else
|
||||
#error APR_SIZEOF_VOIDP value not supported
|
||||
#endif
|
||||
return prev;
|
||||
}
|
||||
|
||||
APR_DECLARE(void*) apr_atomic_xchgptr(volatile void **mem, void *with)
|
||||
{
|
||||
void *prev;
|
||||
#if APR_SIZEOF_VOIDP == 4
|
||||
asm volatile ("xchgl %2, %1"
|
||||
: "=a" (prev), "+m" (*mem)
|
||||
: "0" (with));
|
||||
#elif APR_SIZEOF_VOIDP == 8
|
||||
asm volatile ("xchgq %q2, %1"
|
||||
: "=a" (prev), "+m" (*mem)
|
||||
: "0" (with));
|
||||
#else
|
||||
#error APR_SIZEOF_VOIDP value not supported
|
||||
#endif
|
||||
return prev;
|
||||
}
|
||||
|
||||
#endif /* USE_ATOMICS_IA32 */
|
||||
+205
@@ -0,0 +1,205 @@
|
||||
/* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership.
|
||||
* The ASF licenses this file to You under the Apache License, Version 2.0
|
||||
* (the "License"); you may not use this file except in compliance with
|
||||
* the License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "apr_arch_atomic.h"
|
||||
|
||||
#ifdef USE_ATOMICS_GENERIC
|
||||
|
||||
#include <stdlib.h>
|
||||
|
||||
#if APR_HAS_THREADS
|
||||
# define DECLARE_MUTEX_LOCKED(name, mem) \
|
||||
apr_thread_mutex_t *name = mutex_hash(mem)
|
||||
# define MUTEX_UNLOCK(name) \
|
||||
do { \
|
||||
if (apr_thread_mutex_unlock(name) != APR_SUCCESS) \
|
||||
abort(); \
|
||||
} while (0)
|
||||
#else
|
||||
# define DECLARE_MUTEX_LOCKED(name, mem)
|
||||
# define MUTEX_UNLOCK(name)
|
||||
# warning Be warned: using stubs for all atomic operations
|
||||
#endif
|
||||
|
||||
#if APR_HAS_THREADS
|
||||
|
||||
static apr_thread_mutex_t **hash_mutex;
|
||||
|
||||
#define NUM_ATOMIC_HASH 7
|
||||
/* shift by 2 to get rid of alignment issues */
|
||||
#define ATOMIC_HASH(x) (unsigned int)(((unsigned long)(x)>>2)%(unsigned int)NUM_ATOMIC_HASH)
|
||||
|
||||
static apr_status_t atomic_cleanup(void *data)
|
||||
{
|
||||
if (hash_mutex == data)
|
||||
hash_mutex = NULL;
|
||||
|
||||
return APR_SUCCESS;
|
||||
}
|
||||
|
||||
APR_DECLARE(apr_status_t) apr_atomic_init(apr_pool_t *p)
|
||||
{
|
||||
int i;
|
||||
apr_status_t rv;
|
||||
|
||||
if (hash_mutex != NULL)
|
||||
return APR_SUCCESS;
|
||||
|
||||
hash_mutex = apr_palloc(p, sizeof(apr_thread_mutex_t*) * NUM_ATOMIC_HASH);
|
||||
apr_pool_cleanup_register(p, hash_mutex, atomic_cleanup,
|
||||
apr_pool_cleanup_null);
|
||||
|
||||
for (i = 0; i < NUM_ATOMIC_HASH; i++) {
|
||||
rv = apr_thread_mutex_create(&(hash_mutex[i]),
|
||||
APR_THREAD_MUTEX_DEFAULT, p);
|
||||
if (rv != APR_SUCCESS) {
|
||||
return rv;
|
||||
}
|
||||
}
|
||||
|
||||
return APR_SUCCESS;
|
||||
}
|
||||
|
||||
static APR_INLINE apr_thread_mutex_t *mutex_hash(volatile apr_uint32_t *mem)
|
||||
{
|
||||
apr_thread_mutex_t *mutex = hash_mutex[ATOMIC_HASH(mem)];
|
||||
|
||||
if (apr_thread_mutex_lock(mutex) != APR_SUCCESS) {
|
||||
abort();
|
||||
}
|
||||
|
||||
return mutex;
|
||||
}
|
||||
|
||||
#else
|
||||
|
||||
APR_DECLARE(apr_status_t) apr_atomic_init(apr_pool_t *p)
|
||||
{
|
||||
return APR_SUCCESS;
|
||||
}
|
||||
|
||||
#endif /* APR_HAS_THREADS */
|
||||
|
||||
APR_DECLARE(apr_uint32_t) apr_atomic_read32(volatile apr_uint32_t *mem)
|
||||
{
|
||||
return *mem;
|
||||
}
|
||||
|
||||
APR_DECLARE(void) apr_atomic_set32(volatile apr_uint32_t *mem, apr_uint32_t val)
|
||||
{
|
||||
DECLARE_MUTEX_LOCKED(mutex, mem);
|
||||
|
||||
*mem = val;
|
||||
|
||||
MUTEX_UNLOCK(mutex);
|
||||
}
|
||||
|
||||
APR_DECLARE(apr_uint32_t) apr_atomic_add32(volatile apr_uint32_t *mem, apr_uint32_t val)
|
||||
{
|
||||
apr_uint32_t old_value;
|
||||
DECLARE_MUTEX_LOCKED(mutex, mem);
|
||||
|
||||
old_value = *mem;
|
||||
*mem += val;
|
||||
|
||||
MUTEX_UNLOCK(mutex);
|
||||
|
||||
return old_value;
|
||||
}
|
||||
|
||||
APR_DECLARE(void) apr_atomic_sub32(volatile apr_uint32_t *mem, apr_uint32_t val)
|
||||
{
|
||||
DECLARE_MUTEX_LOCKED(mutex, mem);
|
||||
*mem -= val;
|
||||
MUTEX_UNLOCK(mutex);
|
||||
}
|
||||
|
||||
APR_DECLARE(apr_uint32_t) apr_atomic_inc32(volatile apr_uint32_t *mem)
|
||||
{
|
||||
return apr_atomic_add32(mem, 1);
|
||||
}
|
||||
|
||||
APR_DECLARE(int) apr_atomic_dec32(volatile apr_uint32_t *mem)
|
||||
{
|
||||
apr_uint32_t new;
|
||||
DECLARE_MUTEX_LOCKED(mutex, mem);
|
||||
|
||||
(*mem)--;
|
||||
new = *mem;
|
||||
|
||||
MUTEX_UNLOCK(mutex);
|
||||
|
||||
return new;
|
||||
}
|
||||
|
||||
APR_DECLARE(apr_uint32_t) apr_atomic_cas32(volatile apr_uint32_t *mem, apr_uint32_t with,
|
||||
apr_uint32_t cmp)
|
||||
{
|
||||
apr_uint32_t prev;
|
||||
DECLARE_MUTEX_LOCKED(mutex, mem);
|
||||
|
||||
prev = *mem;
|
||||
if (prev == cmp) {
|
||||
*mem = with;
|
||||
}
|
||||
|
||||
MUTEX_UNLOCK(mutex);
|
||||
|
||||
return prev;
|
||||
}
|
||||
|
||||
APR_DECLARE(apr_uint32_t) apr_atomic_xchg32(volatile apr_uint32_t *mem, apr_uint32_t val)
|
||||
{
|
||||
apr_uint32_t prev;
|
||||
DECLARE_MUTEX_LOCKED(mutex, mem);
|
||||
|
||||
prev = *mem;
|
||||
*mem = val;
|
||||
|
||||
MUTEX_UNLOCK(mutex);
|
||||
|
||||
return prev;
|
||||
}
|
||||
|
||||
APR_DECLARE(void*) apr_atomic_casptr(volatile void **mem, void *with, const void *cmp)
|
||||
{
|
||||
void *prev;
|
||||
DECLARE_MUTEX_LOCKED(mutex, *mem);
|
||||
|
||||
prev = *(void **)mem;
|
||||
if (prev == cmp) {
|
||||
*mem = with;
|
||||
}
|
||||
|
||||
MUTEX_UNLOCK(mutex);
|
||||
|
||||
return prev;
|
||||
}
|
||||
|
||||
APR_DECLARE(void*) apr_atomic_xchgptr(volatile void **mem, void *with)
|
||||
{
|
||||
void *prev;
|
||||
DECLARE_MUTEX_LOCKED(mutex, *mem);
|
||||
|
||||
prev = *(void **)mem;
|
||||
*mem = with;
|
||||
|
||||
MUTEX_UNLOCK(mutex);
|
||||
|
||||
return prev;
|
||||
}
|
||||
|
||||
#endif /* USE_ATOMICS_GENERIC */
|
||||
+207
@@ -0,0 +1,207 @@
|
||||
/* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership.
|
||||
* The ASF licenses this file to You under the Apache License, Version 2.0
|
||||
* (the "License"); you may not use this file except in compliance with
|
||||
* the License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "apr_arch_atomic.h"
|
||||
|
||||
#ifdef USE_ATOMICS_PPC
|
||||
|
||||
#ifdef PPC405_ERRATA
|
||||
# define PPC405_ERR77_SYNC " sync\n"
|
||||
#else
|
||||
# define PPC405_ERR77_SYNC
|
||||
#endif
|
||||
|
||||
APR_DECLARE(apr_status_t) apr_atomic_init(apr_pool_t *p)
|
||||
{
|
||||
return APR_SUCCESS;
|
||||
}
|
||||
|
||||
APR_DECLARE(apr_uint32_t) apr_atomic_read32(volatile apr_uint32_t *mem)
|
||||
{
|
||||
return *mem;
|
||||
}
|
||||
|
||||
APR_DECLARE(void) apr_atomic_set32(volatile apr_uint32_t *mem, apr_uint32_t val)
|
||||
{
|
||||
*mem = val;
|
||||
}
|
||||
|
||||
APR_DECLARE(apr_uint32_t) apr_atomic_add32(volatile apr_uint32_t *mem, apr_uint32_t val)
|
||||
{
|
||||
apr_uint32_t prev, temp;
|
||||
|
||||
asm volatile ("1:\n" /* lost reservation */
|
||||
" lwarx %0,0,%3\n" /* load and reserve */
|
||||
" add %1,%0,%4\n" /* add val and prev */
|
||||
PPC405_ERR77_SYNC /* ppc405 Erratum 77 */
|
||||
" stwcx. %1,0,%3\n" /* store new value */
|
||||
" bne- 1b\n" /* loop if lost */
|
||||
: "=&r" (prev), "=&r" (temp), "=m" (*mem)
|
||||
: "b" (mem), "r" (val)
|
||||
: "cc", "memory");
|
||||
|
||||
return prev;
|
||||
}
|
||||
|
||||
APR_DECLARE(void) apr_atomic_sub32(volatile apr_uint32_t *mem, apr_uint32_t val)
|
||||
{
|
||||
apr_uint32_t temp;
|
||||
|
||||
asm volatile ("1:\n" /* lost reservation */
|
||||
" lwarx %0,0,%2\n" /* load and reserve */
|
||||
" subf %0,%3,%0\n" /* subtract val */
|
||||
PPC405_ERR77_SYNC /* ppc405 Erratum 77 */
|
||||
" stwcx. %0,0,%2\n" /* store new value */
|
||||
" bne- 1b\n" /* loop if lost */
|
||||
: "=&r" (temp), "=m" (*mem)
|
||||
: "b" (mem), "r" (val)
|
||||
: "cc", "memory");
|
||||
}
|
||||
|
||||
APR_DECLARE(apr_uint32_t) apr_atomic_inc32(volatile apr_uint32_t *mem)
|
||||
{
|
||||
apr_uint32_t prev;
|
||||
|
||||
asm volatile ("1:\n" /* lost reservation */
|
||||
" lwarx %0,0,%2\n" /* load and reserve */
|
||||
" addi %0,%0,1\n" /* add immediate */
|
||||
PPC405_ERR77_SYNC /* ppc405 Erratum 77 */
|
||||
" stwcx. %0,0,%2\n" /* store new value */
|
||||
" bne- 1b\n" /* loop if lost */
|
||||
" subi %0,%0,1\n" /* return old value */
|
||||
: "=&b" (prev), "=m" (*mem)
|
||||
: "b" (mem), "m" (*mem)
|
||||
: "cc", "memory");
|
||||
|
||||
return prev;
|
||||
}
|
||||
|
||||
APR_DECLARE(int) apr_atomic_dec32(volatile apr_uint32_t *mem)
|
||||
{
|
||||
apr_uint32_t prev;
|
||||
|
||||
asm volatile ("1:\n" /* lost reservation */
|
||||
" lwarx %0,0,%2\n" /* load and reserve */
|
||||
" subi %0,%0,1\n" /* subtract immediate */
|
||||
PPC405_ERR77_SYNC /* ppc405 Erratum 77 */
|
||||
" stwcx. %0,0,%2\n" /* store new value */
|
||||
" bne- 1b\n" /* loop if lost */
|
||||
: "=&b" (prev), "=m" (*mem)
|
||||
: "b" (mem), "m" (*mem)
|
||||
: "cc", "memory");
|
||||
|
||||
return prev;
|
||||
}
|
||||
|
||||
APR_DECLARE(apr_uint32_t) apr_atomic_cas32(volatile apr_uint32_t *mem, apr_uint32_t with,
|
||||
apr_uint32_t cmp)
|
||||
{
|
||||
apr_uint32_t prev;
|
||||
|
||||
asm volatile ("1:\n" /* lost reservation */
|
||||
" lwarx %0,0,%1\n" /* load and reserve */
|
||||
" cmpw %0,%3\n" /* compare operands */
|
||||
" bne- exit_%=\n" /* skip if not equal */
|
||||
PPC405_ERR77_SYNC /* ppc405 Erratum 77 */
|
||||
" stwcx. %2,0,%1\n" /* store new value */
|
||||
" bne- 1b\n" /* loop if lost */
|
||||
"exit_%=:\n" /* not equal */
|
||||
: "=&r" (prev)
|
||||
: "b" (mem), "r" (with), "r" (cmp)
|
||||
: "cc", "memory");
|
||||
|
||||
return prev;
|
||||
}
|
||||
|
||||
APR_DECLARE(apr_uint32_t) apr_atomic_xchg32(volatile apr_uint32_t *mem, apr_uint32_t val)
|
||||
{
|
||||
apr_uint32_t prev;
|
||||
|
||||
asm volatile ("1:\n" /* lost reservation */
|
||||
" lwarx %0,0,%1\n" /* load and reserve */
|
||||
PPC405_ERR77_SYNC /* ppc405 Erratum 77 */
|
||||
" stwcx. %2,0,%1\n" /* store new value */
|
||||
" bne- 1b" /* loop if lost */
|
||||
: "=&r" (prev)
|
||||
: "b" (mem), "r" (val)
|
||||
: "cc", "memory");
|
||||
|
||||
return prev;
|
||||
}
|
||||
|
||||
APR_DECLARE(void*) apr_atomic_casptr(volatile void **mem, void *with, const void *cmp)
|
||||
{
|
||||
void *prev;
|
||||
#if APR_SIZEOF_VOIDP == 4
|
||||
asm volatile ("1:\n" /* lost reservation */
|
||||
" lwarx %0,0,%1\n" /* load and reserve */
|
||||
" cmpw %0,%3\n" /* compare operands */
|
||||
" bne- 2f\n" /* skip if not equal */
|
||||
PPC405_ERR77_SYNC /* ppc405 Erratum 77 */
|
||||
" stwcx. %2,0,%1\n" /* store new value */
|
||||
" bne- 1b\n" /* loop if lost */
|
||||
"2:\n" /* not equal */
|
||||
: "=&r" (prev)
|
||||
: "b" (mem), "r" (with), "r" (cmp)
|
||||
: "cc", "memory");
|
||||
#elif APR_SIZEOF_VOIDP == 8
|
||||
asm volatile ("1:\n" /* lost reservation */
|
||||
" ldarx %0,0,%1\n" /* load and reserve */
|
||||
" cmpd %0,%3\n" /* compare operands */
|
||||
" bne- 2f\n" /* skip if not equal */
|
||||
PPC405_ERR77_SYNC /* ppc405 Erratum 77 */
|
||||
" stdcx. %2,0,%1\n" /* store new value */
|
||||
" bne- 1b\n" /* loop if lost */
|
||||
"2:\n" /* not equal */
|
||||
: "=&r" (prev)
|
||||
: "b" (mem), "r" (with), "r" (cmp)
|
||||
: "cc", "memory");
|
||||
#else
|
||||
#error APR_SIZEOF_VOIDP value not supported
|
||||
#endif
|
||||
return prev;
|
||||
}
|
||||
|
||||
APR_DECLARE(void*) apr_atomic_xchgptr(volatile void **mem, void *with)
|
||||
{
|
||||
void *prev;
|
||||
#if APR_SIZEOF_VOIDP == 4
|
||||
asm volatile ("1:\n" /* lost reservation */
|
||||
" lwarx %0,0,%1\n" /* load and reserve */
|
||||
PPC405_ERR77_SYNC /* ppc405 Erratum 77 */
|
||||
" stwcx. %2,0,%1\n" /* store new value */
|
||||
" bne- 1b\n" /* loop if lost */
|
||||
" isync\n" /* memory barrier */
|
||||
: "=&r" (prev)
|
||||
: "b" (mem), "r" (with)
|
||||
: "cc", "memory");
|
||||
#elif APR_SIZEOF_VOIDP == 8
|
||||
asm volatile ("1:\n" /* lost reservation */
|
||||
" ldarx %0,0,%1\n" /* load and reserve */
|
||||
PPC405_ERR77_SYNC /* ppc405 Erratum 77 */
|
||||
" stdcx. %2,0,%1\n" /* store new value */
|
||||
" bne- 1b\n" /* loop if lost */
|
||||
" isync\n" /* memory barrier */
|
||||
: "=&r" (prev)
|
||||
: "b" (mem), "r" (with)
|
||||
: "cc", "memory");
|
||||
#else
|
||||
#error APR_SIZEOF_VOIDP value not supported
|
||||
#endif
|
||||
return prev;
|
||||
}
|
||||
|
||||
#endif /* USE_ATOMICS_PPC */
|
||||
+155
@@ -0,0 +1,155 @@
|
||||
/* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership.
|
||||
* The ASF licenses this file to You under the Apache License, Version 2.0
|
||||
* (the "License"); you may not use this file except in compliance with
|
||||
* the License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "apr_arch_atomic.h"
|
||||
|
||||
#ifdef USE_ATOMICS_S390
|
||||
|
||||
APR_DECLARE(apr_status_t) apr_atomic_init(apr_pool_t *p)
|
||||
{
|
||||
return APR_SUCCESS;
|
||||
}
|
||||
|
||||
APR_DECLARE(apr_uint32_t) apr_atomic_read32(volatile apr_uint32_t *mem)
|
||||
{
|
||||
return *mem;
|
||||
}
|
||||
|
||||
APR_DECLARE(void) apr_atomic_set32(volatile apr_uint32_t *mem, apr_uint32_t val)
|
||||
{
|
||||
*mem = val;
|
||||
}
|
||||
|
||||
static APR_INLINE apr_uint32_t atomic_add(volatile apr_uint32_t *mem, apr_uint32_t val)
|
||||
{
|
||||
apr_uint32_t prev = *mem, temp;
|
||||
|
||||
asm volatile ("loop_%=:\n"
|
||||
" lr %1,%0\n"
|
||||
" alr %1,%3\n"
|
||||
" cs %0,%1,%2\n"
|
||||
" jl loop_%=\n"
|
||||
: "+d" (prev), "+d" (temp), "=Q" (*mem)
|
||||
: "d" (val), "m" (*mem)
|
||||
: "cc", "memory");
|
||||
|
||||
return prev;
|
||||
}
|
||||
|
||||
APR_DECLARE(apr_uint32_t) apr_atomic_add32(volatile apr_uint32_t *mem, apr_uint32_t val)
|
||||
{
|
||||
return atomic_add(mem, val);
|
||||
}
|
||||
|
||||
APR_DECLARE(apr_uint32_t) apr_atomic_inc32(volatile apr_uint32_t *mem)
|
||||
{
|
||||
return atomic_add(mem, 1);
|
||||
}
|
||||
|
||||
static APR_INLINE apr_uint32_t atomic_sub(volatile apr_uint32_t *mem, apr_uint32_t val)
|
||||
{
|
||||
apr_uint32_t prev = *mem, temp;
|
||||
|
||||
asm volatile ("loop_%=:\n"
|
||||
" lr %1,%0\n"
|
||||
" slr %1,%3\n"
|
||||
" cs %0,%1,%2\n"
|
||||
" jl loop_%=\n"
|
||||
: "+d" (prev), "+d" (temp), "=Q" (*mem)
|
||||
: "d" (val), "m" (*mem)
|
||||
: "cc", "memory");
|
||||
|
||||
return temp;
|
||||
}
|
||||
|
||||
APR_DECLARE(void) apr_atomic_sub32(volatile apr_uint32_t *mem, apr_uint32_t val)
|
||||
{
|
||||
atomic_sub(mem, val);
|
||||
}
|
||||
|
||||
APR_DECLARE(int) apr_atomic_dec32(volatile apr_uint32_t *mem)
|
||||
{
|
||||
return atomic_sub(mem, 1);
|
||||
}
|
||||
|
||||
APR_DECLARE(apr_uint32_t) apr_atomic_cas32(volatile apr_uint32_t *mem, apr_uint32_t with,
|
||||
apr_uint32_t cmp)
|
||||
{
|
||||
asm volatile (" cs %0,%2,%1\n"
|
||||
: "+d" (cmp), "=Q" (*mem)
|
||||
: "d" (with), "m" (*mem)
|
||||
: "cc", "memory");
|
||||
|
||||
return cmp;
|
||||
}
|
||||
|
||||
APR_DECLARE(apr_uint32_t) apr_atomic_xchg32(volatile apr_uint32_t *mem, apr_uint32_t val)
|
||||
{
|
||||
apr_uint32_t prev = *mem;
|
||||
|
||||
asm volatile ("loop_%=:\n"
|
||||
" cs %0,%2,%1\n"
|
||||
" jl loop_%=\n"
|
||||
: "+d" (prev), "=Q" (*mem)
|
||||
: "d" (val), "m" (*mem)
|
||||
: "cc", "memory");
|
||||
|
||||
return prev;
|
||||
}
|
||||
|
||||
APR_DECLARE(void*) apr_atomic_casptr(volatile void **mem, void *with, const void *cmp)
|
||||
{
|
||||
void *prev = (void *) cmp;
|
||||
#if APR_SIZEOF_VOIDP == 4
|
||||
asm volatile (" cs %0,%2,%1\n"
|
||||
: "+d" (prev), "=Q" (*mem)
|
||||
: "d" (with), "m" (*mem)
|
||||
: "cc", "memory");
|
||||
#elif APR_SIZEOF_VOIDP == 8
|
||||
asm volatile (" csg %0,%2,%1\n"
|
||||
: "+d" (prev), "=Q" (*mem)
|
||||
: "d" (with), "m" (*mem)
|
||||
: "cc", "memory");
|
||||
#else
|
||||
#error APR_SIZEOF_VOIDP value not supported
|
||||
#endif
|
||||
return prev;
|
||||
}
|
||||
|
||||
APR_DECLARE(void*) apr_atomic_xchgptr(volatile void **mem, void *with)
|
||||
{
|
||||
void *prev = (void *) *mem;
|
||||
#if APR_SIZEOF_VOIDP == 4
|
||||
asm volatile ("loop_%=:\n"
|
||||
" cs %0,%2,%1\n"
|
||||
" jl loop_%=\n"
|
||||
: "+d" (prev), "=Q" (*mem)
|
||||
: "d" (with), "m" (*mem)
|
||||
: "cc", "memory");
|
||||
#elif APR_SIZEOF_VOIDP == 8
|
||||
asm volatile ("loop_%=:\n"
|
||||
" csg %0,%2,%1\n"
|
||||
" jl loop_%=\n"
|
||||
: "+d" (prev), "=Q" (*mem)
|
||||
: "d" (with), "m" (*mem)
|
||||
: "cc", "memory");
|
||||
#else
|
||||
#error APR_SIZEOF_VOIDP value not supported
|
||||
#endif
|
||||
return prev;
|
||||
}
|
||||
|
||||
#endif /* USE_ATOMICS_S390 */
|
||||
+79
@@ -0,0 +1,79 @@
|
||||
/* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership.
|
||||
* The ASF licenses this file to You under the Apache License, Version 2.0
|
||||
* (the "License"); you may not use this file except in compliance with
|
||||
* the License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "apr_arch_atomic.h"
|
||||
|
||||
#ifdef USE_ATOMICS_SOLARIS
|
||||
|
||||
#include <atomic.h>
|
||||
|
||||
APR_DECLARE(apr_status_t) apr_atomic_init(apr_pool_t *p)
|
||||
{
|
||||
return APR_SUCCESS;
|
||||
}
|
||||
|
||||
APR_DECLARE(apr_uint32_t) apr_atomic_read32(volatile apr_uint32_t *mem)
|
||||
{
|
||||
return *mem;
|
||||
}
|
||||
|
||||
APR_DECLARE(void) apr_atomic_set32(volatile apr_uint32_t *mem, apr_uint32_t val)
|
||||
{
|
||||
*mem = val;
|
||||
}
|
||||
|
||||
APR_DECLARE(apr_uint32_t) apr_atomic_add32(volatile apr_uint32_t *mem, apr_uint32_t val)
|
||||
{
|
||||
return atomic_add_32_nv(mem, val) - val;
|
||||
}
|
||||
|
||||
APR_DECLARE(void) apr_atomic_sub32(volatile apr_uint32_t *mem, apr_uint32_t val)
|
||||
{
|
||||
atomic_add_32(mem, -val);
|
||||
}
|
||||
|
||||
APR_DECLARE(apr_uint32_t) apr_atomic_inc32(volatile apr_uint32_t *mem)
|
||||
{
|
||||
return atomic_inc_32_nv(mem) - 1;
|
||||
}
|
||||
|
||||
APR_DECLARE(int) apr_atomic_dec32(volatile apr_uint32_t *mem)
|
||||
{
|
||||
return atomic_dec_32_nv(mem);
|
||||
}
|
||||
|
||||
APR_DECLARE(apr_uint32_t) apr_atomic_cas32(volatile apr_uint32_t *mem, apr_uint32_t with,
|
||||
apr_uint32_t cmp)
|
||||
{
|
||||
return atomic_cas_32(mem, cmp, with);
|
||||
}
|
||||
|
||||
APR_DECLARE(apr_uint32_t) apr_atomic_xchg32(volatile apr_uint32_t *mem, apr_uint32_t val)
|
||||
{
|
||||
return atomic_swap_32(mem, val);
|
||||
}
|
||||
|
||||
APR_DECLARE(void*) apr_atomic_casptr(volatile void **mem, void *with, const void *cmp)
|
||||
{
|
||||
return atomic_cas_ptr(mem, (void*) cmp, with);
|
||||
}
|
||||
|
||||
APR_DECLARE(void*) apr_atomic_xchgptr(volatile void **mem, void *with)
|
||||
{
|
||||
return atomic_swap_ptr(mem, with);
|
||||
}
|
||||
|
||||
#endif /* USE_ATOMICS_SOLARIS */
|
||||
+113
@@ -0,0 +1,113 @@
|
||||
/* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership.
|
||||
* The ASF licenses this file to You under the Apache License, Version 2.0
|
||||
* (the "License"); you may not use this file except in compliance with
|
||||
* the License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "apr.h"
|
||||
#include "apr_atomic.h"
|
||||
#include "apr_thread_mutex.h"
|
||||
|
||||
APR_DECLARE(apr_status_t) apr_atomic_init(apr_pool_t *p)
|
||||
{
|
||||
return APR_SUCCESS;
|
||||
}
|
||||
|
||||
APR_DECLARE(apr_uint32_t) apr_atomic_add32(volatile apr_uint32_t *mem, apr_uint32_t val)
|
||||
{
|
||||
#if (defined(_M_IA64) || defined(_M_AMD64))
|
||||
return InterlockedExchangeAdd(mem, val);
|
||||
#else
|
||||
return InterlockedExchangeAdd((long *)mem, val);
|
||||
#endif
|
||||
}
|
||||
|
||||
/* Of course we want the 2's compliment of the unsigned value, val */
|
||||
#ifdef _MSC_VER
|
||||
#pragma warning(disable: 4146)
|
||||
#endif
|
||||
|
||||
APR_DECLARE(void) apr_atomic_sub32(volatile apr_uint32_t *mem, apr_uint32_t val)
|
||||
{
|
||||
#if (defined(_M_IA64) || defined(_M_AMD64))
|
||||
InterlockedExchangeAdd(mem, -val);
|
||||
#else
|
||||
InterlockedExchangeAdd((long *)mem, -val);
|
||||
#endif
|
||||
}
|
||||
|
||||
APR_DECLARE(apr_uint32_t) apr_atomic_inc32(volatile apr_uint32_t *mem)
|
||||
{
|
||||
/* we return old value, win32 returns new value :( */
|
||||
#if (defined(_M_IA64) || defined(_M_AMD64)) && !defined(RC_INVOKED)
|
||||
return InterlockedIncrement(mem) - 1;
|
||||
#else
|
||||
return InterlockedIncrement((long *)mem) - 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
APR_DECLARE(int) apr_atomic_dec32(volatile apr_uint32_t *mem)
|
||||
{
|
||||
#if (defined(_M_IA64) || defined(_M_AMD64)) && !defined(RC_INVOKED)
|
||||
return InterlockedDecrement(mem);
|
||||
#else
|
||||
return InterlockedDecrement((long *)mem);
|
||||
#endif
|
||||
}
|
||||
|
||||
APR_DECLARE(void) apr_atomic_set32(volatile apr_uint32_t *mem, apr_uint32_t val)
|
||||
{
|
||||
#if (defined(_M_IA64) || defined(_M_AMD64)) && !defined(RC_INVOKED)
|
||||
InterlockedExchange(mem, val);
|
||||
#else
|
||||
InterlockedExchange((long*)mem, val);
|
||||
#endif
|
||||
}
|
||||
|
||||
APR_DECLARE(apr_uint32_t) apr_atomic_read32(volatile apr_uint32_t *mem)
|
||||
{
|
||||
return *mem;
|
||||
}
|
||||
|
||||
APR_DECLARE(apr_uint32_t) apr_atomic_cas32(volatile apr_uint32_t *mem, apr_uint32_t with,
|
||||
apr_uint32_t cmp)
|
||||
{
|
||||
#if (defined(_M_IA64) || defined(_M_AMD64)) && !defined(RC_INVOKED)
|
||||
return InterlockedCompareExchange(mem, with, cmp);
|
||||
#else
|
||||
return InterlockedCompareExchange((long*)mem, with, cmp);
|
||||
#endif
|
||||
}
|
||||
|
||||
APR_DECLARE(void *) apr_atomic_casptr(volatile void **mem, void *with, const void *cmp)
|
||||
{
|
||||
#if (defined(_M_IA64) || defined(_M_AMD64)) && !defined(RC_INVOKED)
|
||||
return InterlockedCompareExchangePointer((void* volatile*)mem, with, (void*)cmp);
|
||||
#else
|
||||
return InterlockedCompareExchangePointer((void**)mem, with, (void*)cmp);
|
||||
#endif
|
||||
}
|
||||
|
||||
APR_DECLARE(apr_uint32_t) apr_atomic_xchg32(volatile apr_uint32_t *mem, apr_uint32_t val)
|
||||
{
|
||||
#if (defined(_M_IA64) || defined(_M_AMD64)) && !defined(RC_INVOKED)
|
||||
return InterlockedExchange(mem, val);
|
||||
#else
|
||||
return InterlockedExchange((long *)mem, val);
|
||||
#endif
|
||||
}
|
||||
|
||||
APR_DECLARE(void*) apr_atomic_xchgptr(volatile void **mem, void *with)
|
||||
{
|
||||
return InterlockedExchangePointer((void**)mem, with);
|
||||
}
|
||||
Reference in New Issue
Block a user