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Update README.md

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Erick
2022-03-04 01:40:12 +01:00
parent 613178fc34
commit 23f2cfea4e
1 changed files with 3 additions and 3 deletions
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README.md
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@@ -9,8 +9,8 @@ Most of the gates also have a 16-bit version and eventually a n-way version (som
Ex: a 4-way mux gate: Ex: a 4-way mux gate:
''' '''
'include "mux.v"; include "mux.v";
'include "or4way.v"; include "or4way.v";
module mux4way(out, i0, i1, i2, i3, sel0, sel1); module mux4way(out, i0, i1, i2, i3, sel0, sel1);
input i0, i1, i2, i3; input i0, i1, i2, i3;
@@ -42,7 +42,7 @@ Testbenches are a way to test the implementation of a particular gate using a Ve
Ex: testbench for a xor gate: Ex: testbench for a xor gate:
''' '''
'include "gates/predefined/xor_gate.v" include "gates/predefined/xor_gate.v"
module xor_tb(); module xor_tb();
reg ta, tb; reg ta, tb;