Update README.md

2022-03-07 03:00:12 +01:00
parent dbbc633381
commit a9659bf55e
1 changed files with 2 additions and 0 deletions
@@ -10,6 +10,7 @@ Most of the gates also have a 16-bit version and eventually a n-way version (som
 Ex: a 4-way mux gate:

 '''
+
    module mux4way(out, i0, i1, i2, i3, sel0, sel1);
        input i0, i1, i2, i3;
        input [3:0]sel;
@@ -29,6 +30,7 @@ Ex: a 4-way mux gate:

        or4way(out, tmp0, tmp1, tmp2, tmp3);
    endmodule
+
 '''

 #### Predefined gates (path: /gates/predefined)