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Update README.md

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Erick
2022-03-07 02:58:47 +01:00
parent 42705d8f17
commit d3a9f400e2
1 changed files with 15 additions and 15 deletions
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@@ -10,7 +10,7 @@ Most of the gates also have a 16-bit version and eventually a n-way version (som
Ex: a 4-way mux gate: Ex: a 4-way mux gate:
'''v '''v
module mux4way(out, i0, i1, i2, i3, sel0, sel1); module mux4way(out, i0, i1, i2, i3, sel0, sel1);
input i0, i1, i2, i3; input i0, i1, i2, i3;
input [3:0]sel; input [3:0]sel;
output [3:0]out; output [3:0]out;
@@ -28,7 +28,7 @@ module mux4way(out, i0, i1, i2, i3, sel0, sel1);
and(tmp3, i3, sel1); and(tmp3, i3, sel1);
or4way(out, tmp0, tmp1, tmp2, tmp3); or4way(out, tmp0, tmp1, tmp2, tmp3);
endmodule endmodule
''' '''
#### Predefined gates (path: /gates/predefined) #### Predefined gates (path: /gates/predefined)