Create bit_reg.sv

bit_reg.v is a single bit register that uses a data flipflop

memory/registers/bit_reg.sv

@@ -0,0 +1,14 @@
+import d_flipflop::scope;
+
+package bit_reg (
+    input in;
+    input load;
+    input clk;
+    output out;
+    output out_compl;
+);
+
+    mux(tmp, in, out, load);
+    d_flipflop(out, out_compl, tmp, clk);
+
+endpackage