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adding testbenches

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Erick
2022-02-28 23:55:42 +01:00
parent 680094e4e8
commit 90287bca73
4 changed files with 82 additions and 0 deletions
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gates/testbench/mux.v
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include "mux.v"
module mux_tb();
reg a,b, sel;
output y;
mux dut(a, b, sel, y);
initial begin
a = 0; b = 0; sel = 0;
$monitor("IN: %b, %b ",a, b, "SEL: ",sel, " OUT: ",y);
#5;
a = 1; b = 0; sel = 0;
$monitor("IN: %b, %b ",a, b, "SEL: ",sel, " OUT: ",y);
#5;
a = 0; b = 1; sel = 0;
$monitor("IN: %b, %b ",a, b, "SEL: ",sel, " OUT: ",y);
#5;
a = 1; b = 1; sel = 0;
$monitor("IN: %b, %b ",a, b, "SEL: ",sel, " OUT: ",y);
#5;
a = 0; b = 0; sel = 1;
$monitor("IN: %b, %b ",a, b, "SEL: ",sel, " OUT: ",y);
#5;
a = 1; b = 0; sel = 1;
$monitor("IN: %b, %b ",a, b, "SEL: ",sel, " OUT: ",y);
#5;
a = 0; b = 1; sel = 1;
$monitor("IN: %b, %b ",a, b, "SEL: ",sel, " OUT: ",y);
#5;
a = 1; b = 1; sel = 1;
$monitor("IN: %b, %b ",a, b, "SEL: ",sel, " OUT: ",y);
end
endmodule
gates/testbench/nand_tb.v
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include "nand_gate.v"
module nand_tb();
reg ta,tb;
wire ty;
nand_gate dut(y, ta, tb);
initial begin
ta = 0; tb = 0;
$monitor("IN: %b, %b ",ta, tb, "OUT: ",y);
#5 ta = 1; tb = 0;
$monitor("IN: %b, %b ",ta, tb, "OUT: ",y);
#5 ta = 0; tb = 1;
$monitor("IN: %b, %b ",ta, tb, "OUT: ",y);
#5 ta = 1; tb = 1;
$monitor("IN: %b, %b ",ta, tb, "OUT: ",y);
end
endmodule
gates/testbench/not_tb.v
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include "not_gate.v"
module not_tb();
reg ta;
wire ty;
not_gate dut(y, ta);
initial begin
ta=0;
$monitor("IN: %b", ta, "OUT: ", y)
ta=1;
$monitor("IN: %b", ta, "OUT: ", y)
end
endmodule
gates/testbench/or_tb.v
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include "or_gate.v"
module or_tb();
reg ta, tb;
wire ty;
or_gate dut(y, ta, tb);
initial begin
ta=0, tb=0;
$monitor("IN: %b, %b ",ta, tb, "OUT: ",y);
ta=0, tb=1;
$monitor("IN: %b, %b ",ta, tb, "OUT: ",y);
ta=1, tb=0;
$monitor("IN: %b, %b ",ta, tb, "OUT: ",y);
ta=1, tb=1;
end
endmodule