Add register usage comment

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2026-01-09 11:40:24 +01:00
parent 8205c7892a
commit e24c4ee591
+8 -3
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@@ -1,6 +1,11 @@
; Registers:
; r16: timer0 setup (can reuse after ret)
; r17: timer1 dynamic setup (always needed)
; Register usage:
; (r1 = 0; r1 = 1)
; r16 -> everything related to timer0 and led blinking
; r17:r18 -> 16-bit accumulator (r17 = low byte, r18 = high byte)
; r19:r20 -> 16-bit BPM target (r19 = low byte, r20 = high byte);
;
; r19 -> quantization; how often the ISR runs (affects: jitter, cpu load)
; r21 -> phase resolution (affects: fractional BPM values, error distribution)
timer0_set:
out TCCR0A, r0 ; T/C Control Register A enable normal mode