 Erick
|
4847fed434
|
Merge branch 'main' of https://github.com/erickahmed/square-one
|
2022-03-23 15:09:58 +01:00 |
|
|
Erick
|
724cbc0d52
|
create program counter
|
2022-03-23 15:09:28 +01:00 |
|
 Erick
|
7a1e447bea
|
Delete testbench directory
|
2022-03-23 13:42:23 +01:00 |
|
|
Erick
|
6642d3853d
|
minor comment changes
|
2022-03-23 13:05:58 +01:00 |
|
|
Erick
|
f93143d860
|
create ram16384.sv
|
2022-03-23 13:03:58 +01:00 |
|
|
Erick
|
85fd2df83a
|
output size fix
|
2022-03-23 12:45:55 +01:00 |
|
|
Erick
|
9098b71ccc
|
fixed file name
|
2022-03-23 12:36:15 +01:00 |
|
|
Erick
|
5277d8fd78
|
name changes in ram8 chip used in ram16
|
2022-03-23 12:33:56 +01:00 |
|
|
Erick
|
c166389176
|
create ram512.sv
|
2022-03-23 12:33:22 +01:00 |
|
|
Erick
|
e662434000
|
minor changes
|
2022-03-23 12:29:50 +01:00 |
|
|
Erick
|
4d0a1bb944
|
adding new paragraphs
|
2022-03-22 17:09:01 +01:00 |
|
|
Erick
|
a52dbe03fc
|
Create ram16.sv
16-bit ram chipset
|
2022-03-22 16:47:56 +01:00 |
|
|
Erick
|
c5413708df
|
Create ram8.sv
8-bit ram chipset
|
2022-03-22 16:47:44 +01:00 |
|
|
Erick
|
3196223e02
|
create 16-bit register
|
2022-03-22 16:47:13 +01:00 |
|
|
Erick
|
5613fba905
|
minor fix
|
2022-03-22 16:46:55 +01:00 |
|
|
Erick
|
90f63bd807
|
bugfix
|
2022-03-22 16:46:39 +01:00 |
|
|
Erick
|
3223f3a6af
|
Create bit_reg.sv
bit_reg.v is a single bit register that uses a data flipflop
|
2022-03-08 15:08:04 +01:00 |
|
|
Erick
|
8c70d4384f
|
minor fixes in flipflop logic
|
2022-03-08 15:07:02 +01:00 |
|
|
Erick
|
bfb055ed87
|
Merge branch 'main' of https://github.com/erickahmed/square-one
|
2022-03-08 13:55:29 +01:00 |
|
|
Erick
|
b5d5fb5a05
|
created sr, jk and data flipflops
|
2022-03-08 13:54:42 +01:00 |
|
|
Erick
|
a4c9507c3c
|
add a 3 way version of nand16
|
2022-03-08 13:54:14 +01:00 |
|
|
Erick
|
062c1aefb3
|
minor fixes on alu
|
2022-03-08 13:53:49 +01:00 |
|
|
Erick
|
5cac1f0b68
|
Update .gitignore
|
2022-03-08 13:53:19 +01:00 |
|
|
Erick
|
861f634439
|
Update README.md
|
2022-03-07 03:11:47 +01:00 |
|
|
Erick
|
2874592f4f
|
Update README.md
|
2022-03-07 03:03:19 +01:00 |
|
|
Erick
|
a9659bf55e
|
Update README.md
|
2022-03-07 03:00:12 +01:00 |
|
|
Erick
|
dbbc633381
|
Update README.md
|
2022-03-07 02:59:22 +01:00 |
|
|
Erick
|
d3a9f400e2
|
Update README.md
|
2022-03-07 02:58:47 +01:00 |
|
|
Erick
|
42705d8f17
|
Update README.md
|
2022-03-07 02:57:59 +01:00 |
|
|
Erick
|
e1b3cdab1c
|
Update README.md
|
2022-03-07 02:50:43 +01:00 |
|
|
Erick
|
3ade6ba96a
|
create sr flipflop logic
|
2022-03-07 02:17:10 +01:00 |
|
|
Erick
|
6ac5d8ff63
|
Update README.md
|
2022-03-07 02:16:50 +01:00 |
|
|
Erick
|
1dd49c3f40
|
Update and16_tb.v
|
2022-03-07 02:16:45 +01:00 |
|
|
Erick
|
e8be158685
|
alu bugfix
|
2022-03-07 02:16:33 +01:00 |
|
|
Erick
|
58431ec27f
|
Update .gitignore
|
2022-03-07 02:15:44 +01:00 |
|
|
Erick
|
fa27547a50
|
performance optimizations
added carry lookahead pakage used inside adder16
|
2022-03-05 00:50:03 +01:00 |
|
|
Erick
|
6253e7ecc2
|
error fix on adder
|
2022-03-05 00:27:42 +01:00 |
|
|
Erick
|
bd8b10214c
|
Update README.md
|
2022-03-05 00:03:13 +01:00 |
|
|
Erick
|
ba2cc09b0c
|
Update README.md
|
2022-03-05 00:02:05 +01:00 |
|
|
Erick
|
f78cc40524
|
create ALU
added files:
halfadder.sv
adder.sv
adder16.sv
alu.sv
|
2022-03-05 00:00:16 +01:00 |
|
|
Erick
|
cf48ffa34f
|
Update README.md
|
2022-03-04 23:59:28 +01:00 |
|
|
Erick
|
10096d35c8
|
minor fix
|
2022-03-04 23:59:23 +01:00 |
|
|
Erick
|
d259cdab06
|
Update README.md
|
2022-03-04 01:42:05 +01:00 |
|
|
Erick
|
f0bd0b4a63
|
Update README.md
|
2022-03-04 01:41:06 +01:00 |
|
|
Erick
|
23f2cfea4e
|
Update README.md
|
2022-03-04 01:40:12 +01:00 |
|
|
Erick
|
613178fc34
|
creation of an ALU
|
2022-03-04 01:39:07 +01:00 |
|
|
Erick
|
52c7210d0c
|
Create xor_tb.v
|
2022-03-04 01:38:43 +01:00 |
|
|
Erick
|
d65b968e96
|
update and debug testbench
|
2022-03-04 01:38:36 +01:00 |
|
|
Erick
|
9c4b6b7ce4
|
Update README.md
|
2022-03-04 01:38:09 +01:00 |
|
|
Erick
|
53170f5c5a
|
various fixes
|
2022-03-04 01:38:03 +01:00 |
|