eeeck/iceberg
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Commit Graph

  • 6d8b27dac8 Grouped the gates and corrected xnor16.v nor16.v (#6) main Konstantin 2022-08-26 15:40:32 +02:00
  • 613b7710c7 Fixed syntax error that got unnoticed Erick 2022-07-24 01:13:47 +02:00
  • 84f500e9d6 Update README.md compiler-test assembler-test Erick 2022-04-07 20:41:29 +02:00
  • 35a5980e2a added a description of the next things to do for the vm Erick 2022-04-07 20:35:19 +02:00
  • aa0f2ecd7c Update .gitignore Erick 2022-04-07 20:34:30 +02:00
  • d128a35aef Create main.c Erick 2022-04-07 17:15:26 +02:00
  • 6999a0702b minor fix Erick 2022-04-07 17:15:16 +02:00
  • 51253cbb12 update github stuff Erick 2022-04-07 17:14:44 +02:00
  • 09676ffb82 minor fixes Erick 2022-03-27 19:00:14 +02:00
  • e568e64264 created 16-bit cpu Erick 2022-03-27 18:30:31 +02:00
  • a657c66e09 additional fixes Erick 2022-03-27 16:17:06 +02:00
  • 9a473d1e9e terminate program fix Erick 2022-03-27 15:59:37 +02:00
  • 7e888d8ad6 minor fix Erick 2022-03-27 15:58:07 +02:00
  • cf5ae5a456 update mult.asm Erick 2022-03-27 15:57:45 +02:00
  • 20d74eeac2 create machine code files Erick 2022-03-27 14:37:27 +02:00
  • c3d48c6241 minor changes Erick 2022-03-27 14:37:02 +02:00
  • f078ff9552 create input/output interfaces Erick 2022-03-27 14:36:36 +02:00
  • e9f9952bec update README.md Erick 2022-03-23 15:37:39 +01:00
  • 5fafeb5881 change project name Erick 2022-03-23 15:18:07 +01:00
  • 4847fed434 Merge branch 'main' of https://github.com/erickahmed/square-one Erick 2022-03-23 15:09:58 +01:00
  • 724cbc0d52 create program counter Erick 2022-03-23 15:09:28 +01:00
  • 7a1e447bea Delete testbench directory Erick 2022-03-23 13:42:23 +01:00
  • 6642d3853d minor comment changes Erick 2022-03-23 13:05:58 +01:00
  • f93143d860 create ram16384.sv Erick 2022-03-23 13:03:58 +01:00
  • 85fd2df83a output size fix Erick 2022-03-23 12:45:55 +01:00
  • 9098b71ccc fixed file name Erick 2022-03-23 12:36:15 +01:00
  • 5277d8fd78 name changes in ram8 chip used in ram16 Erick 2022-03-23 12:33:56 +01:00
  • c166389176 create ram512.sv Erick 2022-03-23 12:33:22 +01:00
  • e662434000 minor changes Erick 2022-03-23 12:29:50 +01:00
  • 4d0a1bb944 adding new paragraphs Erick 2022-03-22 17:09:01 +01:00
  • a52dbe03fc Create ram16.sv Erick 2022-03-22 16:47:56 +01:00
  • c5413708df Create ram8.sv Erick 2022-03-22 16:47:44 +01:00
  • 3196223e02 create 16-bit register Erick 2022-03-22 16:47:13 +01:00
  • 5613fba905 minor fix Erick 2022-03-22 16:46:55 +01:00
  • 90f63bd807 bugfix Erick 2022-03-22 16:46:39 +01:00
  • 3223f3a6af Create bit_reg.sv Erick 2022-03-08 15:08:04 +01:00
  • 8c70d4384f minor fixes in flipflop logic Erick 2022-03-08 15:07:02 +01:00
  • bfb055ed87 Merge branch 'main' of https://github.com/erickahmed/square-one Erick 2022-03-08 13:55:29 +01:00
  • b5d5fb5a05 created sr, jk and data flipflops Erick 2022-03-08 13:54:42 +01:00
  • a4c9507c3c add a 3 way version of nand16 Erick 2022-03-08 13:54:14 +01:00
  • 062c1aefb3 minor fixes on alu Erick 2022-03-08 13:53:49 +01:00
  • 5cac1f0b68 Update .gitignore Erick 2022-03-08 13:53:19 +01:00
  • 861f634439 Update README.md Erick 2022-03-07 03:11:47 +01:00
  • 2874592f4f Update README.md Erick 2022-03-07 03:03:19 +01:00
  • a9659bf55e Update README.md Erick 2022-03-07 03:00:12 +01:00
  • dbbc633381 Update README.md Erick 2022-03-07 02:59:22 +01:00
  • d3a9f400e2 Update README.md Erick 2022-03-07 02:58:47 +01:00
  • 42705d8f17 Update README.md Erick 2022-03-07 02:57:59 +01:00
  • e1b3cdab1c Update README.md Erick 2022-03-07 02:50:43 +01:00
  • 3ade6ba96a create sr flipflop logic Erick 2022-03-07 02:17:10 +01:00
  • 6ac5d8ff63 Update README.md Erick 2022-03-07 02:16:50 +01:00
  • 1dd49c3f40 Update and16_tb.v Erick 2022-03-07 02:16:45 +01:00
  • e8be158685 alu bugfix Erick 2022-03-07 02:16:33 +01:00
  • 58431ec27f Update .gitignore Erick 2022-03-07 02:15:44 +01:00
  • fa27547a50 performance optimizations Erick 2022-03-05 00:50:03 +01:00
  • 6253e7ecc2 error fix on adder Erick 2022-03-05 00:27:42 +01:00
  • bd8b10214c Update README.md Erick 2022-03-05 00:03:13 +01:00
  • ba2cc09b0c Update README.md Erick 2022-03-05 00:02:05 +01:00
  • f78cc40524 create ALU Erick 2022-03-05 00:00:16 +01:00
  • cf48ffa34f Update README.md Erick 2022-03-04 23:59:28 +01:00
  • 10096d35c8 minor fix Erick 2022-03-04 23:59:23 +01:00
  • d259cdab06 Update README.md Erick 2022-03-04 01:42:05 +01:00
  • f0bd0b4a63 Update README.md Erick 2022-03-04 01:41:06 +01:00
  • 23f2cfea4e Update README.md Erick 2022-03-04 01:40:12 +01:00
  • 613178fc34 creation of an ALU Erick 2022-03-04 01:39:07 +01:00
  • 52c7210d0c Create xor_tb.v Erick 2022-03-04 01:38:43 +01:00
  • d65b968e96 update and debug testbench Erick 2022-03-04 01:38:36 +01:00
  • 9c4b6b7ce4 Update README.md Erick 2022-03-04 01:38:09 +01:00
  • 53170f5c5a various fixes Erick 2022-03-04 01:38:03 +01:00
  • f598d2d71b Update .gitattributes Erick 2022-03-02 00:33:07 +01:00
  • 21d7b03ec2 Update .gitignore Erick 2022-03-02 00:32:55 +01:00
  • fc71658352 Create README.md Erick 2022-03-02 00:32:50 +01:00
  • a211c76b45 typo Erick 2022-03-02 00:32:46 +01:00
  • 001b7886d6 testbench dump Erick 2022-03-01 23:35:40 +01:00
  • 0646b73f9a gates dump Erick 2022-03-01 23:35:17 +01:00
  • 540aac9fca add demux and testbench Erick 2022-03-01 00:36:52 +01:00
  • bcb06dae6a Create mux.v (multiplexer gate) Erick 2022-02-28 23:56:05 +01:00
  • 90287bca73 adding testbenches Erick 2022-02-28 23:55:42 +01:00
  • 680094e4e8 verilog predefined gates (re)definition Erick 2022-02-28 23:53:53 +01:00
  • e6e955a3b1 Update README.md Erick 2022-02-28 23:44:46 +01:00
  • 38e5cd0f52 Update .gitignore Erick 2022-02-28 23:44:36 +01:00
  • af47b1fe38 fixed typo Erick 2022-02-22 13:19:11 +01:00
  • 2fde4d5bf5 created predefined gates in verilog Erick 2022-02-22 13:06:51 +01:00
  • 4cbdd294fb add git files Erick 2022-02-22 13:06:26 +01:00
  • 63323b9bb6 Initial commit Erick 2022-02-15 00:07:24 +01:00